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Disambiguation of "O'Mahony, Frank"

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A Scalable 5-15 Gbps, 14-75 mW Low-Power I/O Transceiver in 65 nm CMOS.

, , , , , , , and . IEEE J. Solid State Circuits, 43 (4): 1010-1019 (2008)

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Thomas Gregor Frank

Systemische Inflammationsmarker und Koronarkalzifizierungen im Mehrzeilenspiral-Computertomographen bei Patienten mit Verdacht auf koronare Herzkrankheit. Uni Erlangen-Nürnberg, (2009)

Peter Franke

Designing embodied interactive software agents for e-learning: principles, components, and roles. Uni Marburg, (2008)

Frank Frank

Astrid Franke

Andreas Franke

 

Other publications of authors with the same name

Strong Injection Locking in Low- Q LC Oscillators: Modeling and Application in a Forwarded-Clock I/O Receiver., , , , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 56-I (8): 1818-1829 (2009)A 1.41-pJ/b 224-Gb/s PAM4 6-bit ADC-Based SerDes Receiver With Hybrid AFE Capable of Supporting Long Reach Channels., , , , , , , , , and 13 other author(s). IEEE J. Solid State Circuits, 58 (1): 8-18 (2023)A 224-Gb/s DAC-Based PAM-4 Quarter-Rate Transmitter With 8-Tap FFE in 10-nm FinFET., , , , , , , , , and 8 other author(s). IEEE J. Solid State Circuits, 57 (1): 6-20 (2022)Design considerations for low-power receiver front-end in high-speed data links., , , , and . CICC, page 1-8. IEEE, (2013)F6: Energy-efficient I/O design for next-generation systems., , , , , and . ISSCC, page 520-521. IEEE, (2014)10.5 A 5.9pJ/b 10Gb/s serial link with unequalized MM-CDR in 14nm tri-gate CMOS., , , , , , , , , and . ISSCC, page 1-3. IEEE, (2015)A 2GHz-to-7.5GHz quadrature clock-generator using digital delay locked loops for multi-standard I/Os in 14nm CMOS., , , , and . VLSIC, page 1-2. IEEE, (2014)EP3: Innovating on the tapeout treadmill., and . ISSCC, page 1. IEEE, (2015)A 1-mW 12-Gb/s continuous-time adaptive passive equalizer in 90-nm CMOS., , , and . CICC, page 117-120. IEEE, (2009)Strong injection locking of low-Q LC oscillators., , , , , , , and . CICC, page 699-702. IEEE, (2008)