( en | de | ru )

 

Disambiguation of "Thuries, Sébastien"

Author of the publication

copydeleteadd this publication to your clipboard
A flexible modeling environment for a NoC-based multicore architecture.

, , and . HLDVT, page 140-147. IEEE Computer Society, (2012)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Sébastien Beyou

Sébastien Tixeuil

Sébastien Lallé

Sébastien Carcanague

Sébastien Choplin

 

Other publications of authors with the same name

Cell-on-Buffer: New design approach for high-performance and low-power monolithic 3D integrated circuits., , , and . Microelectron. J., (2017)Transistor Temperature Deviation Analysis in Monolithic 3D Standard Cells., , , , , , , , , and 2 other author(s). ISVLSI, page 539-544. IEEE Computer Society, (2017)Recent advances in 3D VLSI integration., , , , , , , , , and 7 other author(s). ICICDT, page 1-4. IEEE, (2016)IntAct: A 96-Core Processor With Six Chiplets 3D-Stacked on an Active Interposer With Distributed Interconnects and Integrated Power Management., , , , , , , , , and 18 other author(s). IEEE J. Solid State Circuits, 56 (1): 79-97 (2021)A comprehensive study of monolithic 3D cell on cell design using commercial 2D tool., , , , , , , , , and 6 other author(s). DATE, page 1192-1196. ACM, (2015)M3D-ADTCO: Monolithic 3D Architecture, Design and Technology Co-Optimization for High Energy Efficient 3D IC., , , , , , and . DATE, page 1740-1745. IEEE, (2020)From 2D to Monolithic 3D: Design Possibilities, Expectations and Challenges., , , , , , , , , and 2 other author(s). ISPD, page 127. ACM, (2015)Monolithic 3D: an alternative to advanced CMOS scaling, technology perspectives and associated design methodology challenges., , , , , , and . ICECS, page 157-160. IEEE, (2018)Impact of intermediate BEOL technology on standard cell performances of 3D VLSI., , , , , , , , , and 3 other author(s). ESSDERC, page 218-221. IEEE, (2016)3DCoB: A new design approach for Monolithic 3D Integrated circuits., , , and . ASP-DAC, page 79-84. IEEE, (2014)