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Low power sub-threshold asynchronous QDI Static Logic Transistor-level Implementation (SLTI) 32-bit ALU., , , and . ISCAS, page 353-356. IEEE, (2013)Low delay-variation sub-/near-threshold asynchronous-to-synchronous interface controller for GALS Network-on-Chips., , , and . APCCAS, page 5-8. IEEE, (2014)High performance low overhead template-based Cell-Interleave Pipeline (TCIP) for asynchronous-logic QDI circuits., , , , , and . ISCAS, page 1762-1765. IEEE, (2016)Energy-Efficient Synchronous-Logic and Asynchronous-Logic FFT/IFFT Processors., , and . IEEE J. Solid State Circuits, 42 (9): 2034-2045 (2007)Low power sub-threshold asynchronous quasi-delay-insensitive 32-bit arithmetic and logic unit based on autonomous signal-validity half-buffer., , , and . IET Circuits Devices Syst., 9 (4): 309-318 (2015)Polyominoes tiling by a genetic algorithm., and . Comput. Optim. Appl., 6 (3): 273-291 (1996)A low-voltage micropower asynchronous multiplier for a multiplierless FIR filter., , and . ISCAS (5), page 381-384. IEEE, (2003)A novel sampling process and pulse generator for a low distortion digital pulse-width modulator for digital class D amplifiers., , , and . ISCAS (4), page 504-507. IEEE, (2003)A Performance Comparison on Asynchronous Matched-delay Templates., , and . ISCAS, page 1008-1011. IEEE, (2009)Designing globally-asynchronous-locally-system from multi-rate Simulink model., and . NEWCAS, page 1-4. IEEE, (2013)