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Disambiguation of "Sato, Shimpei"

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BRein Memory: A Single-Chip Binary/Ternary Reconfigurable in-Memory Deep Neural Network Accelerator Achieving 1.4 TOPS at 0.6 W.

, , , , , , , , , , and . IEEE J. Solid State Circuits, 53 (4): 983-994 (2018)

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Shimpei Ishiyama

Makoto Sato

Nobuko Sato

Fujio Sato

Satô Saburô

 

Other publications of authors with the same name

Tiny On-Chip Memory Realization of Weight Sparseness Split-CNNs on Low-end FPGAs., , and . FCCM, page 229. IEEE, (2020)A Fast Length Matching Routing Pattern Generation Method for Set-Pair Routing Problem Using Selective Pin-Pair Connections., , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 103-A (9): 1037-1044 (2020)A Low Area Overhead Design Method for High-Performance General-Synchronous Circuits with Speculative Execution., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 102-A (12): 1760-1769 (2019)Weight Sparseness for a Feature-Map-Split-CNN Toward Low-Cost Embedded FPGAs., , and . IEICE Trans. Inf. Syst., 104-D (12): 2040-2047 (2021)Humanoid Walking System with CNN-Based Uneven Terrain Recognition and Landing Control with Swing-Leg Velocity Constraints., , , , and . IROS, page 10382-10389. (2023)ArchHDL: A Novel Hardware RTL Design Environment in C++., and . ARC, volume 9040 of Lecture Notes in Computer Science, page 53-64. Springer, (2015)Robust Humanoid Walking System Considering Recognized Terrain and Robots' Balance., , , , , and . IROS, page 8298-8305. IEEE, (2022)Exana: an execution-driven application analysis tool for assisting productive performance tuning., , and . SEPS@SPLASH, page 1-10. ACM, (2015)Demonstration of Object Detection for Event-Driven Cameras on FPGAs and GPUs., , and . FPL, page 461-462. IEEE Computer Society, (2018)Noise Convolutional Neural Networks and FPGA Implementation., , and . ISMVL, page 85-90. IEEE, (2019)