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Disambiguation of "Wen, Xiaoqing"

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A Framework of High-quality Transition Fault ATPG for Scan Circuits.

, , , , , , and . ITC, page 1-6. IEEE Computer Society, (2006)

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Xiaoqing Pan

Xiaoqing Liu

Xiaoqing Li

Xiaoqing Shen

Xiaoqing Jin

 

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Novel Double-Node-Upset-Tolerant Memory Cell Designs Through Radiation-Hardening-by-Design and Layout., , , , and . IEEE Trans. Reliability, 68 (1): 354-363 (2019)A Flexible Scan-in Power Control Method in Logic BIST and Its Evaluation with TEG Chips., , , , and . IEEE Trans. Emerg. Top. Comput., 8 (3): 591-601 (2020)On estimation of NBTI-Induced delay degradation., , , , , and . European Test Symposium, page 107-111. IEEE Computer Society, (2010)A dynamic test compaction procedure for high-quality path delay testing., , , , , and . ASP-DAC, page 348-353. IEEE, (2006)A Static Method for Analyzing Hotspot Distribution on the LSI., , , , and . ITC-Asia, page 73-78. IEEE, (2019)LDAVPM: A Latch Design and Algorithm-Based Verification Protected Against Multiple-Node-Upsets in Harsh Radiation Environments., , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (6): 2069-2073 (June 2023)Cellular Structure-Based Fault-Tolerance TSV Configuration in 3D-IC., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (5): 1196-1208 (2022)A Cost-Effective TSV Repair Architecture for Clustered Faults in 3-D IC., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 40 (9): 1952-1956 (2021)A Secure and Multi-objective Virtual Machine Placement Framework for Cloud Data Centre., , , , and . CoRR, (2021)Quadruple Cross-Coupled Dual-Interlocked-Storage-Cells-Based Multiple-Node-Upset-Tolerant Latch Designs., , , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 67-I (3): 879-890 (2020)