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A GIDL-Current Model for Advanced MOSFET Technologies without Binning., , , , and . IPSJ Trans. Syst. LSI Des. Methodol., (2009)A Compact Model of the Pinch-off Region of 100 nm MOSFETs Based on the Surface-Potential., , , , , , , , , and 1 other author(s). IEICE Trans. Electron., 88-C (5): 1079-1086 (2005)MOSFET harmonic distortion analysis up to the non-quasi-static frequency regime., , , , , , , , , and . CICC, page 827-830. IEEE, (2005)NVDL-Cache: Narrow-Width Value Aware Variable Delay Low-Power Data Cache., , , , , and . ICCD, page 264-272. IEEE, (2019)Compact modeling of dynamic trap density evolution for predicting circuit-performance aging., , , , , , and . Microelectron. Reliab., (2018)Modeling of dynamic trap density increase for aging simulation of any MOSFET circuits., , , , , , , , , and 1 other author(s). ESSDERC, page 192-195. IEEE, (2017)Compact Modeling for Power Efficient Circuit Design., , , , , , , and . ESSDERC, page 234-237. IEEE, (2018)Non-quasi-static approach with surface-potential-based MOSFET model HiSIM for RF circuit simulations., , , , , , , , , and 2 other author(s). Math. Comput. Simul., 79 (4): 1096-1106 (2008)Prevention of Highly Power-Efficient Circuits due to Short-Channel Effects in MOSFETs., , , , , , , , , and . IEICE Trans. Electron., 102-C (6): 487-494 (2019)Analysis of Embedded-Diode Performance in MOSFET under Switching Condition., , , , , and . ISDCS, page 1-4. IEEE, (2019)