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On the Development of Totally Self-checking Hardware Design for the SHA-1 Hash Function., , , , и . SECRYPT, стр. 270-275. SciTePress, (2012)A novel coarse-grain reconfigurable data-path for accelerating DSP kernels., , , , и . FPGA, стр. 252. ACM, (2004)A Novel Constant-Time Fault-Secure Binary Counter., , , и . PATMOS, том 3254 из Lecture Notes in Computer Science, стр. 742-749. Springer, (2004)Area-Throughput Trade-Offs for SHA-1 and SHA-256 Hash Functions' Pipelined Designs., , , , , и . Journal of Circuits, Systems, and Computers, 25 (4): 1650032:1-1650032:26 (2016)Power aware data type refinement on the HIPERLAN/2., , , , , и . ICECS, стр. 216-219. IEEE, (2003)A high performance data-path to accelerate DSP kernels., , , , и . ICECS, стр. 495-498. IEEE, (2004)A high-performance data path for synthesizing DSP kernels., , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 25 (6): 1154-1162 (2006)Optimising the SHA-512 cryptographic hash function on FPGAs., , , и . IET Comput. Digit. Tech., 8 (2): 70-82 (2014)An reconfigurable multiplier in GF(2m) for elliptic curve cryptosystem., , и . ICECS, стр. 699-702. IEEE, (2003)Accelerating DSP Applications on a Mixed Granularity Platform with a New Reconfigurable Coarse-Grain Data-Path., , , , и . FCCM, стр. 275-276. IEEE Computer Society, (2004)