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Improving the design flow for parallel and heterogeneous architectures running real-time applications: The PHARAON FP7 project.

, , , , , , , , , , , and . Microprocess. Microsystems, 38 (8): 960-975 (2014)

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Automatic Synthesis over Multiple APIs from Uml/Marte Models for Easy Platform Mapping and Reuse., , , and . DSD, page 443-450. IEEE Computer Society, (2014)Synthesis of simulation and implementation code for OpenMAX multimedia heterogeneous systems from UML/MARTE models., , , , , and . Multim. Tools Appl., 76 (6): 8195-8226 (2017)Improving the design flow for parallel and heterogeneous architectures running real-time applications: The PHARAON FP7 project., , , , , , , , , and 2 other author(s). Microprocess. Microsystems, 38 (8): 960-975 (2014)Data flow analysis from UML/MARTE models based on binary traces., , and . DCIS, page 1-6. IEEE, (2020)UML-Based Design Flow for Systems with Neural Networks., , and . DCIS, page 1-6. IEEE, (2023)Automatic synthesis from UML/MARTE models using channel semantics., , , and . ACES-MB@MoDELS, page 49-54. ACM, (2012)Automatic synthesis of embedded SW for evaluating physical implementation alternatives from UML/MARTE models supporting memory space separation., , , and . Microelectron. J., 45 (10): 1281-1291 (2014)Accelerating Host-Compiled Simulation by Modifying IR Code: Industrial application in the spatial domain., , and . DCIS, page 1-6. IEEE, (2019)Accelerating the Verification of Forward Error Correction Decoders by PCIe FPGA Cards., , , and . IEEE Embed. Syst. Lett., 15 (3): 157-160 (September 2023)Systematic Embedded Software Generation from Systemc., , , and . Embedded Software for SoC, Kluwer / Springer, (2003)