Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Creating High Performance Applications with Intel's FPGA OpenCL™ SDK.

A. Ling, U. Aydonat, S. O'Connell, D. Capalija, and G. Chiu. IWOCL, page 11:1. ACM, (2017)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Utku Topal

Emine Utku

Fatma Özde Ütkür

Nalân Utku

Sitki Utku Teksöz

Other publications of authors with the same name

From opencl to high-performance hardware on FPGAS.T. Czajkowski, U. Aydonat, D. Denisenko, J. Freeman, M. Kinsner, D. Neto, J. Wong, P. Yiannacouras, and D. Singh. FPL, page 531-534. IEEE, (2012)Compute Substrate for Software 2.0.J. Vasiljevic, L. Bajic, D. Capalija, S. Sokorac, D. Ignjatovic, L. Bajic, M. Trajkovic, I. Hamer, I. Matosevic, A. Cejkov and 34 other author(s). IEEE Micro, 41 (2): 50-55 (2021)Parallelization of multimedia applications on the multi-level computing architecture.U. Aydonat, and T. Abdelrahman. J. Embed. Comput., 4 (3-4): 87-106 (2011)A Multilevel Computing Architecture for Embedded Multimedia Applications.F. Karim, A. Mellan, A. Nguyen, U. Aydonat, and T. Abdelrahman. IEEE Micro, 24 (3): 56-66 (2004)An OpenCL(TM) Deep Learning Accelerator on Arria 10.U. Aydonat, S. O'Connell, D. Capalija, A. Ling, and G. Chiu. CoRR, (2017)Relaxed Concurrency Control in Software Transactional Memory.U. Aydonat, and T. Abdelrahman. IEEE Trans. Parallel Distributed Syst., 23 (7): 1312-1325 (2012)In-Package Domain-Specific ASICs for Intel® Stratix® 10 FPGAs: A Case Study of Accelerating Deep Learning Using TensorTile ASIC.E. Nurvitadhi, J. Cook, A. Mishra, D. Marr, K. Nealis, P. Colangelo, A. Ling, D. Capalija, U. Aydonat, A. Dasu and 1 other author(s). FPL, page 106-110. IEEE Computer Society, (2018)In-Package Domain-Specific ASICs for Intel® Stratix® 10 FPGAs: A Case Study of Accelerating Deep Learning Using TensorTile ASIC(Abstract Only).E. Nurvitadhi, J. Cook, A. Mishra, D. Marr, K. Nealis, P. Colangelo, A. Ling, D. Capalija, U. Aydonat, S. Shumarayev and 1 other author(s). FPGA, page 287. ACM, (2018)An OpenCL™ Deep Learning Accelerator on Arria 10.U. Aydonat, S. O'Connell, D. Capalija, A. Ling, and G. Chiu. FPGA, page 55-64. ACM, (2017)Hardware Support for Relaxed Concurrency Control in Transactional Memory.U. Aydonat, and T. Abdelrahman. MICRO, page 15-26. IEEE Computer Society, (2010)

BibSonomy

Disambiguation of "Aydonat, Utku"

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Creating High Performance Applications with Intel's FPGA OpenCL™ SDK.

Please choose a person to relate this publication to

Utku Topal

Emine Utku

Fatma Özde Ütkür

Nalân Utku

Sitki Utku Teksöz

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Aydonat, Utku"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Creating High Performance Applications with Intel's FPGA OpenCL™ SDK.

Please choose a person to relate this publication to

Utku Topal

Emine Utku

Fatma Özde Ütkür

Nalân Utku

Sitki Utku Teksöz

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Creating High Performance Applications with Intel's FPGA OpenCL™ SDK.