Novelics, a leading provider of system-on-chip (SoC) embedded memory intellectual property (IP), announced the availability of its one-transistor SRAM for 65-nanometer semiconductor design, the only SRAM-1T memory available to SoC designers in bulk CMOS using the standard silicon wafer process. Novelics’ coolSRAM-1T is designed to optimize memory-intensive applications in computing, networking, wireless, multimedia, graphics, automotive, consumer electronics products and more by:
* Shrinking the SoC embedded memory area up to 50 percent versus using industry-standard SRAM
* Lowering development time and costs through standard bulk CMOS that eliminates extra mask layers and special processing steps
* Reducing memory leakage power consumption by a factor of 10
* Offering the opportunity in many designs to reduce or eliminate off-chip memory systems, enabling dramatic savings in system cost and power consumption
P. Melliar-Smith, L. Moser, и P. Narasimhan. WORDS '97: Proceedings of the 3rd Workshop on Object-Oriented Real-Time Dependable Systems - (WORDS '97), стр. 272. Washington, DC, USA, IEEE Computer Society, (1997)
M. Revelle, T. Broadbent, и D. Coppit. IWPC '05: Proceedings of the 13th International Workshop on Program Comprehension, стр. 23--32. Washington, DC, USA, IEEE Computer Society, (2005)
I. Lee, H. Kim, P. Yang, S. Yoo, E. Choi, J. Kong, и S. Eo. ASP-DAC '06: Proceedings of the 2006 Conference on Asia South Pacific Design Automation, стр. 551--558. New York, NY, USA, ACM Press, (2006)
M. Shokouhi, P. Chubak, и Z. Raeesy. Information Technology: Coding and Computing, 2005. ITCC 2005. International Conference on, 2, стр. 503- 508 Vol. 2. (2005)
M. Eaddy, A. Aho, и G. Murphy. ACoM '07: Proceedings of the First International Workshop on Assessment of Contemporary Modularization Techniques, стр. 2. Washington, DC, USA, IEEE Computer Society, (2007)