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Disambiguation of "Meinerzhagen, Pascal"

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A ReRAM-based non-volatile flip-flop with sub-VT read and CMOS voltage-compatible write.

, , , , , and . NEWCAS, page 1-4. IEEE, (2013)

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Bernd Meinerzhagen

Bernd Meinerzhagen

Bernd Meinerzhagen

Wilhelm Meinerzhagen

Klaus Meinerzhagen

 

Other publications of authors with the same name

Replica bit-line technique for embedded multilevel gain-cell DRAM., , and . NEWCAS, page 77-80. IEEE, (2012)A 2.6 mV/b Resolution, 1.2 GHz Throughput, All-Digital Voltage Droop Monitor Using Coupled Ring Oscillators in Intel 4 CMOS., , , , , , , , and . VLSI Technology and Circuits, page 1-2. IEEE, (2023)An All-Digital, VMAX-Compliant, and Stable Distributed Charge Injection Scheme for Fast Mitigation of Voltage Droop., , , , , , and . ESSCIRC, page 1-4. IEEE, (2019)A ReRAM-based non-volatile flip-flop with sub-VT read and CMOS voltage-compatible write., , , , , and . NEWCAS, page 1-4. IEEE, (2013)Automating Design For Yield: Silicon Learning to Predictive Models and Design Optimization., , , , and . ITC, page 1-10. IEEE, (2020)A process compensated gain cell embedded-DRAM for ultra-low-power variation-aware design., , , , and . ISCAS, page 1006-1009. IEEE, (2016)Dual-VT 4kb sub-VT memories with <1 pW/bit leakage in 65 nm CMOS., , , , and . ESSCIRC, page 197-200. IEEE, (2013)Automated Design For Yield Through Defect Tolerance., , and . VTS, page 1-6. IEEE, (2020)Design methodology for area and energy efficient OxRAM-based non-volatile flip-flop., , , , , , and . ISCAS, page 1-4. IEEE, (2017)An Ultra-Low-Power Application-Specific Processor with Sub-VT Memories for Compressed Sensing., , , , , , and . VLSI-SoC (Selected Papers), volume 418 of IFIP Advances in Information and Communication Technology, page 88-106. Springer, (2012)