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Optimized Communication Architecture of MPSoCs with a Hardware Scheduler: A System-Level Analysis.

, , , , , , and . Int. J. Embed. Real Time Commun. Syst., 2 (3): 1-20 (2011)

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Improving ESL power models using switching activity information from timed functional models., , , , and . SCOPES, page 89-97. ACM, (2014)Creation of ESL power models for communication architectures using automatic calibration., , , , , , and . DAC, page 58:1-58:58. ACM, (2013)Optimized Communication Architecture of MPSoCs with a Hardware Scheduler: A System-Level Analysis., , , , , , and . Int. J. Embed. Real Time Commun. Syst., 2 (3): 1-20 (2011)Task management in MPSoCs: An ASIP approach., , , , , and . ICCAD, page 587-594. ACM, (2009)Application-aware spinlock control using a hardware scheduler in MPSoC platforms., , , , , , and . ISSoC, page 1-6. IEEE, (2012)Optimized communication architecture of MPSoCs with a hardware scheduler: A system view., , , , , , and . SoC, page 163-168. IEEE, (2010)Efficient Implementation of Application-Aware Spinlock Control in MPSoCs., , , , , , and . Int. J. Embed. Real Time Commun. Syst., 4 (1): 64-84 (2013)OCR with the Deep CNN Model for Ligature Script-Based Languages like Manchu., , , and . Sci. Program., (2021)A High-Sensitivity Wake-up Receiver Using Tunnel Diode for ISM Band., , , , , and . ICCT, page 1493-1496. IEEE, (2022)