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Multi-strategy active learning for power quality disturbance identification., , , , , , and . Appl. Soft Comput., (2024)SAGERoute: Synergistic Analog Routing Considering Geometric and Electrical Constraints with Manual Design Compatibility., , , , , , , , and . DATE, page 1-6. IEEE, (2023)Interactive Analog Layout Editing With Instant Placement and Routing Legalization., , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (3): 698-711 (March 2023)The Dawn of AI-Native EDA: Promises and Challenges of Large Circuit Models., , , , , , , , , and 24 other author(s). CoRR, (2024)Multi-Task Autoencoder for Noise-Robust Speech Recognition., , , and . ICASSP, page 5599-5603. IEEE, (2018)Least Squares Twin Support Vector Machine Based on Manifold-based Within-class Scatter., , , and . SSCI, page 2897-2902. IEEE, (2019)A Class of Fuzzy Smooth Piecewise Twin Support Vector Machine., , , and . CIS, page 382-385. IEEE Computer Society, (2018)Feature Selection Based on Twin Support Vector Regression., , , and . SSCI, page 2903-2907. IEEE, (2019)A 4-bit Calibration-Free Computing-In-Memory Macro With 3T1C Current-Programed Dynamic-Cascode Multi-Level-Cell eDRAM., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 59 (3): 842-854 (March 2024)Post-Layout Simulation Driven Analog Circuit Sizing., , , , , , , , and . CoRR, (2023)