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Disambiguation of "Dhar, Tonmoy"

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A solitary protection measure against scan chain, fault injection, and power analysis attacks on AES.

, , and . MWSCAS, page 575-578. IEEE, (2017)

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Jawaharlal Dhar

Tulika Dhar

Rajkumar Dhar

Asok Dhar

Elavarasi Dharmalingam

Coordination of membran cytoskeleton interactions: role of syndapins and Abp 1 = Koordination von Membran-Zytoskelett-Interaktionen. Uni Jena, (2009)
 

Other publications of authors with the same name

Aging of Current DACs and its Impact in Equalizer Circuits., , , and . IRPS, page 1-6. IEEE, (2021)Machine Learning Techniques in Analog Layout Automation., , , , , , , , , and 3 other author(s). ISPD, page 71-72. ACM, (2021)Reliability Analysis of a Delay-Locked Loop Under HCI and BTI Degradation., and . IRPS, page 1-6. IEEE, (2019)Fast and Efficient Constraint Evaluation of Analog Layout Using Machine Learning Models., , , , , , , , , and . ASP-DAC, page 158-163. ACM, (2021)GANA: Graph Convolutional Network Based Automated Netlist Annotation for Analog Circuits., , , , , , , , , and . DATE, page 55-60. IEEE, (2020)A solitary protection measure against scan chain, fault injection, and power analysis attacks on AES., , and . MWSCAS, page 575-578. IEEE, (2017)A Charge Flow Formulation for Guiding Analog/Mixed-Signal Placement., , , , , , and . DATE, page 148-153. IEEE, (2022)A general approach for identifying hierarchical symmetry constraints for analog circuit layout., , , , , and . ICCAD, page 120:1-120:8. IEEE, (2020)Learning from Experience: Applying ML to Analog Circuit Design., , , , , , , , , and 2 other author(s). ISPD, page 55. ACM, (2020)The ALIGN Open-Source Analog Layout Generator: v1.0 and Beyond (Invited talk)., , , , , , , , , and 3 other author(s). ICCAD, page 54:1-54:2. IEEE, (2020)