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Differential equivalent time sampling receiver for breast cancer detection., , , , , , , и . BioCAS, стр. 1-4. IEEE, (2017)Chip-Level Substrate Noise Analysis with Network Reduction by Fundamental Matrix Computation., , , , и . ISQED, стр. 482-487. IEEE Computer Society, (2001)Background Calibration Techniques for Low-Power and High-Speed Data Conversion., , , и . IEICE Trans. Electron., 94-C (6): 923-929 (2011)Substrate Noise Analysis with Compact Digital Noise Injection and Substrate Models., , , , и . ASP-DAC/VLSI Design, стр. 71-76. IEEE Computer Society, (2002)Investigation of phase noise and jitter in CMOS sampling clock generation circuits for time-domain breast cancer detection system., , , , , , , и . BioCAS, стр. 1-4. IEEE, (2017)Evaluation of Isolation Structures against High-Frequency Substrate Coupling in Analog/Mixed-Signal Integrated Circuits., , , и . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 90-A (2): 380-387 (2007)CMOS Gaussian Monocycle Pulse Transceiver for Radar-Based Microwave Imaging., , , , , , , , , и 6 other автор(ы). IEEE Trans. Biomed. Circuits Syst., 14 (6): 1333-1345 (2020)Chip-Level Substrate Coupling Analysis with Reference Structures for Verification., , , и . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 90-A (12): 2651-2660 (2007)Shifting Clock Jitter and Phase Interval for Impulse-Radar-Based Breast Cancer Detection., , , , , , , , , и . BioCAS, стр. 1-4. IEEE, (2019)Chip-Level Substrate Noise Analysis with Emphasis of Vertical Impurity Profile for Isolation., , , и . CICC, стр. 849-852. IEEE, (2007)