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Disambiguation of "Agarwal, Sukarn"

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Compound Memory Models.

, , , , , and . Proc. ACM Program. Lang., 7 (PLDI): 1145-1168 (2023)

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Seema Agarwal

Suman Agarwal

Swarna Agarwal

Jugalkishor Agarwal

Sameer Agarwal

 

Other publications of authors with the same name

Reuse Distance-based Victim Cache for Effective Utilisation of Hybrid Main Memory System., , and . ACM Trans. Design Autom. Electr. Syst., 25 (3): 24:1-24:32 (2020)Towards Analysing the Effect of Hybrid Caches on the Temperature of Tiled Chip Multi-Processors., , , , and . iSES, page 52-57. IEEE, (2018)Compound Memory Models., , , , , and . Proc. ACM Program. Lang., 7 (PLDI): 1145-1168 (2023)DELICIOUS: Deadline-Aware Approximate Computing in Cache-Conscious Multicore., , , , , and . IEEE Trans. Parallel Distributed Syst., 34 (2): 718-733 (February 2023)Towards a Better Lifetime for Non-volatile Caches in Chip Multiprocessors., and . VLSID, page 29-34. IEEE Computer Society, (2017)Restricting writes for energy-efficient hybrid cache in multi-core architectures., and . VLSI-SoC, page 1-6. IEEE, (2016)Improving the Performance of Hybrid Caches Using Partitioned Victim Caching., and . ACM Trans. Embed. Comput. Syst., 20 (1): 5:1-5:27 (2021)DidaSel: dirty data based selection of VC for effective utilization of NVM buffers in on-chip interconnects., , and . ISLPED, page 151-156. ACM, (2020)DAMUS: Dynamic Allocation based on Write Frequency in MUlti-Retention STT-RAM based Last Level Caches., , , , and . ISQED, page 469-475. IEEE, (2021)Fault Tolerance in Network on Chip Using Bypass Path Establishing Packets., , and . VLSID, page 457-458. IEEE Computer Society, (2018)