Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Energy-Aware Code Replication for Improving Reliability in Embedded Chip Multiprocessors., , , and . SoCC, page 77-78. IEEE, (2006)Using Task Recomputation During Application Mapping in Parallel Embedded Architectures., , and . CDES, page 29-35. CSREA Press, (2006)Hybrid-comp: A criticality-aware compressed last-level cache., , , and . ISQED, page 25-30. IEEE, (2018)Array Regrouping and Its Use in Compiling Data-Intensive Embedded Applications., and . IEEE Trans. Computers, 53 (1): 1-19 (2004)Leveraging value locality for efficient design of a hybrid cache in multicore processors., , , and . ICCAD, page 1-8. IEEE, (2017)The Sleep Deprivation Attack in Sensor Networks: Analysis and Methods of Defense., , , , , and . IJDSN, 2 (3): 267-287 (2006)FUSE: Fusing STT-MRAM into GPUs to Alleviate Off-Chip Memory Access Overheads., , and . HPCA, page 426-439. IEEE, (2019)Adaptive prefetching for shared cache based chip multiprocessors., , and . DATE, page 773-778. IEEE, (2009)Performance aware secure code partitioning., , and . DATE, page 1122-1127. EDA Consortium, San Jose, CA, USA, (2007)Memory bank aware dynamic loop scheduling., , , and . DATE, page 1671-1676. EDA Consortium, San Jose, CA, USA, (2007)