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A 7-nm 4-GHz Arm¹-Core-Based CoWoS¹ Chiplet Design for High-Performance Computing.

, , , , , , , , , , , , , , , , and . IEEE J. Solid State Circuits, 55 (4): 956-966 (2020)

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A misconception in blocking time analyses under multiprocessor synchronization protocols., , and . Real Time Syst., 53 (2): 187-195 (2017)Uniprocessor Scheduling Strategies for Self-Suspending Task Systems., , , and . RTNS, page 119-128. ACM, (2016)On the Formalism and Properties of Timing Analyses in Real-Time Embedded Systems., , , , and . A Journey of Embedded and Cyber-Physical Systems, page 37-55. Springer, (2021)A 2.5-8Gb/s transceiver with 5-tap DFE and Second order CDR against 28-inch channel and 5000ppm SSC in 40nm CMOS technology., , , , , , , , , and 7 other author(s). CICC, page 1-4. IEEE, (2010)State of the art for scheduling and analyzing self-suspending sporadic real-time tasks., , , and . RTCSA, page 1-10. IEEE Computer Society, (2017)On Closing the Gap Between Pre-Simulation and Post-Simulation Results in Nanometer Analog Layouts., , , , , and . SMACD, page 181-184. IEEE, (2018)Many suspensions, many problems: a review of self-suspending tasks in real-time systems., , , , , , , , , and 3 other author(s). Real Time Syst., 55 (1): 144-207 (2019)Errata for Three Papers (2004-05) on Fixed-Priority Scheduling with Self-Suspensions., , , , and . Leibniz Trans. Embed. Syst., 5 (1): 02:1-02:20 (2018)Schedulability and Optimization Analysis for Non-preemptive Static Priority Scheduling Based on Task Utilization and Blocking Factors., , and . ECRTS, page 90-101. IEEE Computer Society, (2015)k2U: A General Framework from k-Point Effective Schedulability Analysis to Utilization-Based Tests., , and . RTSS, page 107-118. IEEE Computer Society, (2015)