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Analysis of the effect of the gate oxide breakdown on SRAM stability.

R. Rodríguez, J. Stathis, B. Linder, S. Kowalczyk, C. Chuang, R. Joshi, G. Northrop, K. Bernstein, A. Bhavnagarwala, and S. Lombardo. Microelectron. Reliab., 42 (9-11): 1445-1448 (2002)

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Akeem Mayowa Azeez

Heinrich J J Mieschendahl

Norbert J J Bock

J J M Ramakers

Ulrich J J Longerich

Other publications of authors with the same name

CMOS system-on-a-chip voltage scaling beyond 50nm.A. Bhavnagarwala, B. Austin, A. Kapoor, and J. Meindl. ACM Great Lakes Symposium on VLSI, page 7-12. ACM, (2000)The impact of intrinsic device fluctuations on CMOS SRAM cell stability.A. Bhavnagarwala, X. Tang, and J. Meindl. IEEE J. Solid State Circuits, 36 (4): 658-665 (2001)Minimum supply voltage for bulk Si CMOS GSI.A. Bhavnagarwala, B. Austin, and J. Meindl. ISLPED, page 100-102. ACM, (1998)A Sub-600-mV, Fluctuation Tolerant 65-nm CMOS SRAM Array With Dynamic Cell Biasing.A. Bhavnagarwala, S. Kosonocky, C. Radens, Y. Chan, K. Stawiasz, U. Srinivasan, S. Kowalczyk, and M. Ziegler. IEEE J. Solid State Circuits, 43 (4): 946-955 (2008)Analysis of the effect of the gate oxide breakdown on SRAM stability.R. Rodríguez, J. Stathis, B. Linder, S. Kowalczyk, C. Chuang, R. Joshi, G. Northrop, K. Bernstein, A. Bhavnagarwala, and S. Lombardo. Microelectron. Reliab., 42 (9-11): 1445-1448 (2002)Low-power circuits and technology for wireless digital systems.S. Kosonocky, A. Bhavnagarwala, K. Chin, G. Gristede, A. Haen, W. Hwang, M. Ketchen, S. Kim, D. Knebel, K. Warren and 1 other author(s). IBM J. Res. Dev., 47 (2-3): 283-298 (2003)A minimum total power methodology for projecting limits on CMOS GSI.A. Bhavnagarwala, B. Austin, K. Bowman, and J. Meindl. IEEE Trans. Very Large Scale Integr. Syst., 8 (3): 235-251 (2000)Circuit techniques for low-power CMOS GSI.A. Bhavnagarwala, V. De, B. Austin, and J. Meindl. ISLPED, page 193-196. IEEE, (1996)Interconnect-centric Array Architectures for Minimum SRAM Access Time.A. Bhavnagarwala, S. Kosonocky, and J. Meindl. ICCD, page 400-405. IEEE Computer Society, (2001)

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Disambiguation of "Bhavnagarwala, Azeez J."

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Analysis of the effect of the gate oxide breakdown on SRAM stability.

Please choose a person to relate this publication to

Akeem Mayowa Azeez

Heinrich J J Mieschendahl

Norbert J J Bock

J J M Ramakers

Ulrich J J Longerich

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Bhavnagarwala, Azeez J."

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Analysis of the effect of the gate oxide breakdown on SRAM stability.

Please choose a person to relate this publication to

Akeem Mayowa Azeez

Heinrich J J Mieschendahl

Norbert J J Bock

J J M Ramakers

Ulrich J J Longerich

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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Analysis of the effect of the gate oxide breakdown on SRAM stability.