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Disambiguation of "Nogawa, Masafumi"

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Small and Low-Cost Dual-Rate Optical Triplexer for OLT Transceivers in 10G/1G Co-existing 10G-EPON Systems.

, , , , , , , , , , and . IEICE Trans. Electron., 96-C (7): 996-1002 (2013)

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Masafumi Nakanishi

Masafumi Tanaka

Masafumi Tanaka

 

Other publications of authors with the same name

20.1-mW 8-Gbps UWB-IR millimeter-wave transmitter using an OOK pulse modulator based on CMOS inverters., , , , and . ISCAS, page 2696-2699. IEEE, (2014)A 12.5-Gb/s Parallel Phase Detection Clock and Data Recovery Circuit in 0.13-$muhbox m$CMOS., , and . IEEE J. Solid State Circuits, 41 (9): 2052-2057 (2006)Session 7 overview: Optical transceivers and silicon photonics., and . ISSCC, page 114-115. IEEE, (2013)BiCMOS circuit technology for a 704 MHz ATM switch LSI., , , , , , , and . IEEE J. Solid State Circuits, 29 (5): 557-563 (May 1994)A 10Gb/s burst-mode laser diode driver for burst-by-burst power saving., , , and . ISSCC, page 414-416. IEEE, (2012)F3: Emerging technologies for wireline communication., , , , , , and . ISSCC, page 504-505. IEEE, (2013)A PVT Tolerant STM-16 Clock-and-Data Recovery LSI Using an On-Chip Loop-Gain Variation Compensation Architecture in 0.20-µm CMOS/SOI., , , and . IEICE Trans. Electron., 91-C (4): 655-661 (2008)A 10Gb/s burst-mode adaptive gain select limiting amplifier in 0.13µm CMOS., , , , , and . ISSCC, page 940-949. IEEE, (2006)A 10-Gb/s Burst-Mode Clock-and-Data Recovery IC with Frequency-Adjusting Dual Gated VCOs., , , , , , , and . IEICE Trans. Electron., 91-C (6): 903-910 (2008)A data-transition look-ahead DFF circuit for statistical reduction in power consumption., and . IEEE J. Solid State Circuits, 33 (5): 702-706 (1998)