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Enabling adaptability through elastic clocks., , и . DAC, стр. 8-10. ACM, (2009)Software Development for High-Performance, Reconfigurable, Embedded Multimedia Systems., , и . IEEE Des. Test Comput., 22 (1): 28-38 (2005)Timed Shannon Circuits: A Power-Efficient Design Style and Synthesis Tool., , , и . DAC, стр. 254-260. ACM Press, (1995)Solving the State Assignment Problem for Signal Transition Graphs., , , и . DAC, стр. 568-572. IEEE Computer Society Press, (1992)Quasi-static Scheduling for Concurrent Architectures., , , , и . Fundam. Informaticae, 62 (2): 171-196 (2004)A region-based theory for state assignment in speed-independent circuits., , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 16 (8): 793-812 (1997)Design of a pseudo-log image transform hardware accelerator in a high-level synthesis-based memory management framework., , , и . J. Electronic Imaging, 23 (5): 053012 (2014)Modeling and Designing Heterogeneous Systems., , , , , и . Concurrency and Hardware Design, том 2549 из Lecture Notes in Computer Science, стр. 228-273. Springer, (2002)Acceleration by Inline Cache for Memory-Intensive Algorithms on FPGA via High-Level Synthesis., , , и . IEEE Access, (2017)A software development tool chain for a reconfigurable processor., , и . CASES, стр. 93-98. ACM, (2001)