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A Method of Static Test Compaction Based on Don't Care Identification.

, , and . DELTA, page 392-395. IEEE Computer Society, (2002)

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On Guaranteeing Capture Safety in At-Speed Scan Testing with Broadcast-Scan-Based Test Compression., , , , , and . VLSI Design, page 279-284. IEEE Computer Society, (2013)On Improving Defect Coverage of Stuck-at Fault Tests., , , , and . Asian Test Symposium, page 216-223. IEEE Computer Society, (2005)A novel capture-safety checking method for multi-clock designs and accuracy evaluation with delay capture circuits., , , , , , , and . VTS, page 197-202. IEEE Computer Society, (2012)Adaptive ECC Techniques for Reliability and Yield Enhancement of Phase Change Memory., , and . IOLTS, page 226-227. IEEE, (2018)A Method of Static Test Compaction Based on Don't Care Identification., , and . DELTA, page 392-395. IEEE Computer Society, (2002)High Launch Switching Activity Reduction in At-Speed Scan Testing Using CTX: A Clock-Gating-Based Test Relaxation and X-Filling Scheme., , , , , , , and . IEICE Trans. Inf. Syst., 93-D (1): 2-9 (2010)A GA-Based X-Filling for Reducing Launch Switching Activity toward Specific Objectives in At-Speed Scan Testing., , , , and . IEICE Trans. Inf. Syst., 94-D (4): 833-840 (2011)Scan-Out Power Reduction for Logic BIST., , , and . IEICE Trans. Inf. Syst., 96-D (9): 2012-2020 (2013)A Practical Online Error Detection Method for Functional Safety Using Three-Site Implications., , , and . ITC, page 63-72. IEEE, (2022)On Test Data Volume Reduction for Multiple Scan Chain Designs., , , and . VTS, page 103-110. IEEE Computer Society, (2002)