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Disambiguation of "Choo, Hunsoo"

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Complexity reduction of digital filters using shift inclusive differential coefficients.

, , and . IEEE Trans. Signal Process., 52 (6): 1760-1772 (2004)

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Prem Choontanom

Suma Choorapoikayil

Noppon Choosri

Ping Chook

Vahid Choopankareh

 

Other publications of authors with the same name

Layout-driven architecture synthesis for high-speed digital filters., , , and . IEEE Trans. Very Large Scale Integr. Syst., 14 (2): 203-207 (2006)Energy-efficient Hardware Architecture and VLSI Implementation of a Polyphase Channelizer with Applications to Subband Adaptive Filtering., , , , , , and . J. Signal Process. Syst., 58 (2): 125-137 (2010)MRPF: An Architectural Transformation for Synthesis of High-Performance and Low-Power Digital Filters., , and . DATE, page 10700-10705. IEEE Computer Society, (2003)Decision feedback equalizer with two's complement computation sharing multiplication., , and . ICASSP, page 1245-1248. IEEE, (2001)Joint control of communication subsystems for low-energy image transmission., and . ICASSP (3), page 529-532. IEEE, (2005)Hardware architecture and VLSI implementation of a low-power high-performance polyphase channelizer with applications to subband adaptive filtering., , , , , , and . ICASSP (5), page 97-100. IEEE, (2004)Complexity reduction of digital filters using shift inclusive differential coefficients., , and . IEEE Trans. Signal Process., 52 (6): 1760-1772 (2004)Two's complement computation sharing multiplier and its applications to high performance DFE., , and . IEEE Trans. Signal Process., 51 (2): 458-469 (2003)Non-adaptive and adaptive filter implementation based on sharing multiplication., , , , , and . ICASSP, page 460-463. IEEE, (2000)High performance and low power FIR filter design based on sharing multiplication., , , , , and . ISLPED, page 295-300. ACM, (2002)