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Disambiguation of "Lim, Ji-Hoon"

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A Digitally-Controlled SMPS Using a Novel High-Resolution DPWM Generator Based on a Pseudo Relaxation-Oscillation Technique.

, , , , and . IEICE Trans. Electron., 96-C (2): 277-284 (2013)

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Ji-Hoon Hong

Seong-Hoon Lim

Yun-Ji Lim

Ji-Young Lim

Christina Hoon

 

Other publications of authors with the same name

Design of Cyber Attack Precursor Symptom Detection Algorithm through System Base Behavior Analysis and Memory Monitoring., , , , and . FGIT-FGCN (2), volume 120 of Communications in Computer and Information Science, page 276-283. Springer, (2010)A Study on Markerless AR-Based Infant Education System Using CBIR., and . SUComS, volume 78 of Communications in Computer and Information Science, page 52-58. Springer, (2010)A 7 Gb/s/pin 1 Gbit GDDR5 SDRAM With 2.5 ns Bank to Bank Active Time and No Bank Group Restriction., , , , , , , , , and 20 other author(s). IEEE J. Solid State Circuits, 46 (1): 107-118 (2011)An 80 nm 4 Gb/s/pin 32 bit 512 Mb GDDR4 Graphics DRAM With Low Power and Low Noise Data Bus Inversion., , , , , , , , , and 14 other author(s). IEEE J. Solid State Circuits, 43 (1): 121-131 (2008)A Single-Ended Parallel Transceiver With Four-Bit Four-Wire Four-Level Balanced Coding for the Point-to-Point DRAM Interface., , , , , , , , , and . IEEE J. Solid State Circuits, 51 (8): 1890-1901 (2016)Differential Power Processing Converter With Active Clamp Structure and Integrated Planar Transformer for Power Generation Optimization of Multiple Photovoltaic Submodules., , , and . IEEE Access, (2023)One-chip multi-output SMPS using a shared digital controller and a pseudo relaxation oscillating technique., , , and . ISOCC, page 513-516. IEEE, (2012)An Improved PWM Method of Inverter PFC for Non-Isolated OBC., , , , , , and . IECON, page 1-6. IEEE, (2023)Inductor Design of Interleaved Totem-Pole Bridgeless Boost PFC Based on Pareto Optimization., , , , and . IECON, page 1-6. IEEE, (2023)A Novel High-Speed and Low-Voltage CMOS Level-Up/Down Shifter Design for Multiple-Power and Multiple-Clock Domain Chips., , , , and . IEICE Trans. Electron., 90-C (3): 644-648 (2007)