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A Processor-Based Built-In Self-Repair Design for Embedded Memories.

, , and . Asian Test Symposium, page 366-371. IEEE Computer Society, (2003)

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A Built-in Self-Diagnosis and Repair Design With Fail Pattern Identification for Memories., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 19 (12): 2184-2194 (2011)MRAM Defect Analysis and Fault Modeli., , , , , , and . ITC, page 124-133. IEEE Computer Society, (2004)A Parallel Built-in Diagnostic Scheme for Multiple Embedded Memories., , , , and . MTDT, page 65-69. IEEE Computer Society, (2004)Testing Methodology of Embedded DRAMs., , , and . ITC, page 1-9. IEEE Computer Society, (2008)A Processor-Based Built-In Self-Repair Design for Embedded Memories., , and . Asian Test Symposium, page 366-371. IEEE Computer Society, (2003)On Test and Diagnostics of Flash Memories., , , , and . Asian Test Symposium, page 260-265. IEEE Computer Society, (2004)Fault models and test methods for subthreshold SRAMs., , , , and . ITC, page 427-436. IEEE Computer Society, (2010)Defect Oriented Fault Analysis for SRAM., , and . Asian Test Symposium, page 256-261. IEEE Computer Society, (2003)A Testability-Driven Optimizer and Wrapper Generator for Embedded Memories., , , and . MTDT, page 53-. IEEE Computer Society, (2003)Testing methods for a write-assist disturbance-free dual-port SRAM., , , , , , and . VTS, page 1-6. IEEE Computer Society, (2014)