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Disambiguation of "Palomar, Oscar"

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DiMP: Architectural Support for Direct Message Passing on Shared Memory Multi-cores.

, , , and . ICPP, page 130-139. IEEE Computer Society, (2015)

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Oscar Günther

Oscar Landtreter

Oscar Miller

Oscar Thaysen

Oscar Kienzle

 

Other publications of authors with the same name

Power estimation tool for system on programmable chip based platforms (abstract only)., , , and . FPGA, page 256. ACM, (2014)PETS: Power and energy estimation tool at system-level., , , , , and . ISQED, page 535-542. IEEE, (2014)A RISC-V Simulator and Benchmark Suite for Designing and Evaluating Vector Architectures., , , , , and . ACM Trans. Archit. Code Optim., 17 (4): 38:1-38:30 (2020)Dynamic-vector execution on a general purpose EDGE chip multiprocessor., , , , , , , , and . ICSAMOS, page 18-25. IEEE, (2014)DVINO: A RISC-V Vector Processor Implemented in 65nm Technology., , , , , , , , , and 33 other author(s). DCIS, page 1-6. IEEE, (2022)POSTER: An Integrated Vector-Scalar Design on an In-order ARM Core., , , , , , and . PACT, page 447-448. ACM, (2016)Proceedings of the Thirteenth International Workshop on Programmability and Architectures for Heterogeneous Multicores (MULTIPROG-2020)., , , and . CoRR, (2020)ViPS: Visual processing system for medical imaging., , , , and . BMEI, page 40-45. IEEE, (2015)Vector Processing-Aware Advanced Clock-Gating Techniques for Low-Power Fused Multiply-Add., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 26 (4): 639-652 (2018)Hardware Acceleration for Query Processing: Leveraging FPGAs, CPUs, and Memory., , , , , , and . Comput. Sci. Eng., 18 (1): 80-87 (2016)