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A 187.5µVrms-read-noise 51mW 1.4Mpixel CMOS image sensor with PMOSCAP column CDS and 10b self-differential offset-cancelled pipeline SAR-ADC.

, , , , , , , , , , , и . ISSCC, стр. 494-495. IEEE, (2013)

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Takeshi Morita

Takeshi Morita

Takeshi Imamura

Takeshi Omori

Takeshi Yasui

 

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A 2.9mW, +/- 85ppm accuracy reference clock generator based on RC oscillator with on-chip temperature calibration., , , и . VLSIC, стр. 1-2. IEEE, (2014)A 187.5µVrms-read-noise 51mW 1.4Mpixel CMOS image sensor with PMOSCAP column CDS and 10b self-differential offset-cancelled pipeline SAR-ADC., , , , , , , , , и 2 other автор(ы). ISSCC, стр. 494-495. IEEE, (2013)A channel-erasing 1.8-V-only 32-Mb NOR flash EEPROM with a bitline direct sensing scheme., , , , , , , , , и 5 other автор(ы). IEEE J. Solid State Circuits, 35 (11): 1648-1654 (2000)A 44-mm2 four-bank eight-word page-read 64-Mb flash memory with flexible block redundancy and fast accurate word-line voltage controller., , , , , , , , , и 4 other автор(ы). IEEE J. Solid State Circuits, 37 (11): 1485-1492 (2002)Wordline voltage generating system for low-power low-voltage flash memories., , , , , , , , и . IEEE J. Solid State Circuits, 36 (1): 55-63 (2001)A CMOS bandgap reference circuit with sub-1-V operation., , , , , , и . IEEE J. Solid State Circuits, 34 (5): 670-674 (1999)