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Disambiguation of "Pionteck, Thilo"

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Hardware-Accelerated Radix-Tree Based String Sorting for Big Data Applications.

, , , , , , and . ARCS, volume 10172 of Lecture Notes in Computer Science, page 47-58. Springer, (2017)

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Thilo Pionteck

Jürgen Pionteck

Hans Thilow

Heinz Thilo

Detlev Thilo-Körner

 

Other publications of authors with the same name

Design of a reconfigurable AES encryption/decryption engine for mobile terminals., , , , and . ISCAS (2), page 545-548. IEEE, (2004)Integration dynamisch rekonfigurierbarer Funktionseinheiten in Prozessoren., , , , and . ARCS Workshops, volume P-41 of LNI, page 155-164. GI, (2004)Teaching Informatics Students the Secrets of Hardware Design.. MSE, page 31-32. IEEE Computer Society, (2007)Coding-aware Link Energy Estimation for 2D and 3D Networks-on-Chip with Virtual Channels., , , , and . PATMOS, page 222-228. IEEE, (2018)Architecture, Dataflow and Physical Design Implications of 3D-ICs for DNN-Accelerators., , , , , , and . ISQED, page 60-66. IEEE, (2021)FPGA-Integrated Bag of Little Bootstraps Accelerator for Approximate Database Query Processing., , , , , , and . ARC, volume 14251 of Lecture Notes in Computer Science, page 115-130. Springer, (2023)Continuous live-tracing as debugging approach on FPGAs., , , and . ReConFig, page 1-8. IEEE, (2017)Adaptive allocation of default router paths in Network-on-Chips for latency reduction., , and . HPCS, page 140-147. IEEE, (2016)A simulation environment for design space exploration for asymmetric 3D-Network-on-Chip., , , , and . ReCoSoC, page 1-8. IEEE, (2016)Ratatoskr: An open-source framework for in-depth power, performance and area analysis in 3D NoCs., , , , , and . CoRR, (2019)