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An 80nm 4Gb/s/pin 32b 512Mb GDDR4 Graphics DRAM with Low-Power and Low-Noise Data-Bus Inversion.

, , , , , , , , , , , , , , , , , , , , , , , , , , , , и . ISSCC, стр. 492-617. IEEE, (2007)

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Dae Hyun Kim

Dae-Hyun Yang

Dae-Soon Kim

Yong-Dae Kim

Dae-Uh Kim

 

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