( en | de | ru )

 

Disambiguation of "Plouchart, Jean-Olivier"

Author of the publication

copydeleteadd this publication to your clipboard
A Modular All-Digital PLL Architecture Enabling Both 1-to-2GHz and 24-to-32GHz Operation in 65nm CMOS.

, , , , , and . ISSCC, page 516-517. IEEE, (2008)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Nicolas Jeanvoine

Plasma-material interaction and electrode degradation in high voltage ignition discharges. Uni Saarbrücken, (2009)

Johann Jeanson

Helga Jeanblanc

Marc Jean-Richard-dit-Bressel

Antoine Jeanjean

 

Other publications of authors with the same name

An Integral Path Self-Calibration Scheme for a Dual-Loop PLL., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 48 (4): 996-1008 (2013)Indirect Performance Sensing for On-Chip Self-Healing of Analog and RF Circuits., , , , , , , , , and 4 other author(s). IEEE Trans. Circuits Syst. I Regul. Pap., 61-I (8): 2243-2252 (2014)An integral path self-calibration scheme for a 20.1-26.7GHz dual-loop PLL in 32nm SOI CMOS., , , , , , , , , and 1 other author(s). VLSIC, page 176-177. IEEE, (2012)Statistical Framework for Technology-Model-Product Co-Design and Convergence., , , , and . DAC, page 503-508. IEEE, (2007)A 4GS/s, 8.45 ENOB and 5.7fJ/conversion, digital assisted, sampling system in 45nm CMOS SOI., , and . CICC, page 1-4. IEEE, (2011)Indirect performance sensing for on-chip analog self-healing via Bayesian model fusion., , , , , , , , , and 4 other author(s). CICC, page 1-4. IEEE, (2013)A low-voltage 40-GHz complementary VCO with 15% frequency tuning range in SOI CMOS technology., , , , , , , and . IEEE J. Solid State Circuits, 39 (5): 841-846 (2004)A 24-30-GHz 256-Element Dual-Polarized 5G Phased Array Using Fast On-Chip Beam Calculators and Magnetoelectric Dipole Antennas., , , , , , , , , and 5 other author(s). IEEE J. Solid State Circuits, 57 (12): 3599-3616 (2022)An ultra-high bandwidth sub-ranging ADC with programmable dynamic range in 32nm CMOS SOI., , and . MWSCAS, page 448-451. IEEE, (2017)Frequency-independent equivalent circuit model for on-chip spiral inductors., , , , , , , and . CICC, page 217-220. IEEE, (2002)