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A 32 nm SoC With Dual Core ATOM Processor and RF WiFi Transceiver.

H. Lakdawala, M. Schaecher, C. Fu, R. Limaye, J. Duster, Y. Tan, A. Balankutty, E. Alpman, C. Lee, K. Nguyen, H. Lee, A. Ravi, S. Suzuki, B. Carlton, H. Kim, M. Verhelst, S. Pellerano, T. Kim, S. Venkatesan, D. Srivastava, P. Vandervoorn, J. Rizk, C. Jan, S. Ramamurthy, R. Yavatkar, and K. Soumyanath. IEEE J. Solid State Circuits, 48 (1): 91-103 (2013)

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Fu-Chang Chang

Tsung-ming Chang

Tsung-Tung Chang

Other publications of authors with the same name

A 2.5GHz 32nm 0.35mm2 3.5dB NF -5dBm P1dB fully differential CMOS push-pull LNA with integrated 34dBm T/R switch and ESD protection.C. Fu, H. Lakdawala, S. Taylor, and K. Soumyanath. ISSCC, page 56-58. IEEE, (2011)A 32 nm SoC With Dual Core ATOM Processor and RF WiFi Transceiver.H. Lakdawala, M. Schaecher, C. Fu, R. Limaye, J. Duster, Y. Tan, A. Balankutty, E. Alpman, C. Lee, K. Nguyen and 16 other author(s). IEEE J. Solid State Circuits, 48 (1): 91-103 (2013)An 8.5MHz 67.2dB SNDR CTDSM with ELD compensation embedded twin-T SAB and circular TDC-based quantizer in 90nm CMOS.C. Weng, T. Wei, E. Alpman, C. Fu, Y. Tseng, and T. Lin. VLSIC, page 1-2. IEEE, (2014)A Continuous-Time Delta-Sigma Modulator Using ELD-Compensation-Embedded SAB and DWA-Inherent Time-Domain Quantizer.C. Weng, T. Wei, E. Alpman, C. Fu, and T. Lin. IEEE J. Solid State Circuits, 51 (5): 1235-1245 (2016)A 2.4GHz WLAN transceiver with fully-integrated highly-linear 1.8V 28.4dBm PA, 34dBm T/R switch, 240MS/s DAC, 320MS/s ADC, and DPLL in 32nm SoC CMOS.Y. Tan, J. Duster, C. Fu, E. Alpman, A. Balankutty, C. Lee, A. Ravi, S. Pellerano, K. Chandrashekar, H. Kim and 5 other author(s). VLSIC, page 76-77. IEEE, (2012)A Fully Integrated Ultra-Low Insertion Loss T/R Switch for 802.11b/g/n Application in 90 nm CMOS Process.A. Kidwai, C. Fu, J. Jensen, and S. Taylor. IEEE J. Solid State Circuits, 44 (5): 1352-1360 (2009)32nm x86 OS-compliant PC on-chip with dual-core Atom® processor and RF WiFi transceiver.H. Lakdawala, M. Schaecher, C. Fu, R. Limaye, J. Duster, Y. Tan, A. Balankutty, E. Alpman, C. Lee, S. Suzuki and 13 other author(s). ISSCC, page 62-64. IEEE, (2012)

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Disambiguation of "Fu, Chang-Tsung"

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A 32 nm SoC With Dual Core ATOM Processor and RF WiFi Transceiver.

Please choose a person to relate this publication to

Fu-Chang Chang

Tsung-ming Chang

Tsung-Tung Chang

Tsung-Tung Chang

Tsung-Tung Chang

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Fu, Chang-Tsung"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 32 nm SoC With Dual Core ATOM Processor and RF WiFi Transceiver.

Please choose a person to relate this publication to

Fu-Chang Chang

Tsung-ming Chang

Tsung-Tung Chang

Tsung-Tung Chang

Tsung-Tung Chang

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
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APA
Chicago
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A 32 nm SoC With Dual Core ATOM Processor and RF WiFi Transceiver.