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A 32 nm SoC With Dual Core ATOM Processor and RF WiFi Transceiver.

H. Lakdawala, M. Schaecher, C. Fu, R. Limaye, J. Duster, Y. Tan, A. Balankutty, E. Alpman, C. Lee, K. Nguyen, H. Lee, A. Ravi, S. Suzuki, B. Carlton, H. Kim, M. Verhelst, S. Pellerano, T. Kim, S. Venkatesan, D. Srivastava, P. Vandervoorn, J. Rizk, C. Jan, S. Ramamurthy, R. Yavatkar, and K. Soumyanath. IEEE J. Solid State Circuits, 48 (1): 91-103 (2013)

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Lars Düster

Gertrud Düster

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A 2.4GHz WLAN transceiver with fully-integrated highly-linear 1.8V 28.4dBm PA, 34dBm T/R switch, 240MS/s DAC, 320MS/s ADC, and DPLL in 32nm SoC CMOS.Y. Tan, J. Duster, C. Fu, E. Alpman, A. Balankutty, C. Lee, A. Ravi, S. Pellerano, K. Chandrashekar, H. Kim and 5 other author(s). VLSIC, page 76-77. IEEE, (2012)32nm x86 OS-compliant PC on-chip with dual-core Atom® processor and RF WiFi transceiver.H. Lakdawala, M. Schaecher, C. Fu, R. Limaye, J. Duster, Y. Tan, A. Balankutty, E. Alpman, C. Lee, S. Suzuki and 13 other author(s). ISSCC, page 62-64. IEEE, (2012)A 32 nm SoC With Dual Core ATOM Processor and RF WiFi Transceiver.H. Lakdawala, M. Schaecher, C. Fu, R. Limaye, J. Duster, Y. Tan, A. Balankutty, E. Alpman, C. Lee, K. Nguyen and 16 other author(s). IEEE J. Solid State Circuits, 48 (1): 91-103 (2013)A comparative study of MOS VCOs for low voltage high performance operation.J. Zhan, J. Duster, and K. Kornegay. ISLPED, page 244-247. ACM, (2004)A 1.5 V, 5 MW current mode analog baseband processor IC for wideband wireless systems.F. Baez, J. Duster, and K. Kornegay. Circuits, Signals, and Systems, page 123-127. IASTED/ACTA Press, (2005)Design of an ultra-wideband low noise amplifier in 0.13µm CMOS.Y. Wang, J. Duster, and K. Kornegay. ISCAS (5), page 5067-5070. IEEE, (2005)A low power 60 DB control range programmable gain amplifier in sige technology.F. Baez, J. Duster, and K. Kornegay. Circuits, Signals, and Systems, page 478-482. IASTED/ACTA Press, (2004)A 18.7 dB gain, 2.0 dB noise figure low-noise amplifier in SiGe technology for various 2.4 GHz applications.J. Jr., J. Duster, and K. Kornegay. Circuits, Signals, and Systems, page 537-540. IASTED/ACTA Press, (2004)Analysis of emitter degenerated LC oscillators using bipolar technologies.J. Zhan, K. Maurice, J. Duster, and K. Kornegay. ISCAS (1), page 669-672. IEEE, (2003)A 1.5V class A 5th order log domain filter in SiGe technology.F. Baez, J. Duster, and K. Kornegay. ISCAS (1), page 853-860. IEEE, (2004)

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Disambiguation of "Duster, Jon"

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A 32 nm SoC With Dual Core ATOM Processor and RF WiFi Transceiver.

Please choose a person to relate this publication to

Lars Düster

Gertrud Düster

Peter Düster

Alexander Düster

Barbara Düster

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Duster, Jon"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 32 nm SoC With Dual Core ATOM Processor and RF WiFi Transceiver.

Please choose a person to relate this publication to

Lars Düster

Gertrud Düster

Peter Düster

Alexander Düster

Barbara Düster

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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URL
DOI
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APA
Chicago
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A 32 nm SoC With Dual Core ATOM Processor and RF WiFi Transceiver.