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Designs of Two Quadruple-Node-Upset Self-Recoverable Latches for Highly Robust Computing in Harsh Radiation Environments.

A. Yan, Z. Li, J. Cui, Z. Huang, T. Ni, P. Girard, and X. Wen. IEEE Trans. Aerosp. Electron. Syst., 59 (3): 2885-2897 (June 2023)

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Aibin Liang

Yan Yan

Shanshan Yan

Americanization in China: an analysis of General Motors and its strategies in ChinaS. Yan. Uni Mainz, (2009)

Yan Xu

Untersuchungen zur Verleimung von Holz und Holzspanplatten mit UF-Leimharzen und PMDIY. Xu. TU Braunschweig, (2009)

Yan Xu

Other publications of authors with the same name

Information Assurance Through Redundant Design: A Novel TNU Error-Resilient Latch for Harsh Radiation Environment.A. Yan, Y. Hu, J. Cui, Z. Chen, Z. Huang, T. Ni, P. Girard, and X. Wen. IEEE Trans. Computers, 69 (6): 789-799 (2020)Architecture of Cobweb-Based Redundant TSV for Clustered Faults.T. Ni, D. Liu, Q. Xu, Z. Huang, H. Liang, and A. Yan. IEEE Trans. Very Large Scale Integr. Syst., 28 (7): 1736-1739 (2020)Design of a Novel Self-Recoverable SRAM Cell Protected Against Soft Errors.A. Yan, J. Zhou, Y. Hu, Y. Chen, Z. Wu, and T. Ni. DSA, page 497-498. IEEE, (2019)Design of Double-Upset Recoverable and Transient-Pulse Filterable Latches for Low-Power and Low-Orbit Aerospace Applications.A. Yan, Y. Chen, Z. Xu, Z. Chen, J. Cui, Z. Huang, P. Girard, and X. Wen. IEEE Trans. Aerosp. Electron. Syst., 56 (5): 3931-3940 (2020)A Soft-Error-Immune Quadruple-Node-Upset Tolerant Latch.Z. Huang, L. Duan, Y. Zhang, T. Ni, and A. Yan. IEEE Trans. Aerosp. Electron. Syst., 59 (3): 2621-2632 (June 2023)A Novel TDMA-Based Fault Tolerance Technique for the TSVs in 3D-ICs Using Honeycomb Topology.T. Ni, Z. Yang, H. Chang, X. Zhang, L. Lu, A. Yan, Z. Huang, and X. Wen. IEEE Trans. Emerg. Top. Comput., 9 (2): 724-734 (2021)Two Double-Node-Upset-Hardened Flip-Flop Designs for High-Performance Applications.A. Yan, A. Cao, Z. Huang, J. Cui, T. Ni, P. Girard, X. Wen, and J. Zhang. IEEE Trans. Emerg. Top. Comput., 11 (4): 1070-1081 (October 2023)Novel Low Cost, Double-and-Triple-Node-Upset-Tolerant Latch Designs for Nano-scale CMOS.A. Yan, C. Lai, Y. Zhang, J. Cui, Z. Huang, J. Song, J. Guo, and X. Wen. IEEE Trans. Emerg. Top. Comput., 9 (1): 520-533 (2021)Novel Quadruple-Node-Upset-Tolerant Latch Designs With Optimized Overhead for Reliable Computing in Harsh Radiation Environments.A. Yan, Z. Xu, X. Feng, J. Cui, Z. Chen, T. Ni, Z. Huang, P. Girard, and X. Wen. IEEE Trans. Emerg. Top. Comput., 10 (1): 404-413 (2022)Pattern Reorder for Test Cost Reduction Through Improved SVMRANK Algorithm.T. Song, H. Liang, T. Ni, Z. Huang, Y. Lu, J. Wan, and A. Yan. IEEE Access, (2020)

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Disambiguation of "Yan, Aibin"

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Designs of Two Quadruple-Node-Upset Self-Recoverable Latches for Highly Robust Computing in Harsh Radiation Environments.

Please choose a person to relate this publication to

Aibin Liang

Yan Yan

Shanshan Yan

Yan Xu

Yan Xu

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Yan, Aibin"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Designs of Two Quadruple-Node-Upset Self-Recoverable Latches for Highly Robust Computing in Harsh Radiation Environments.

Please choose a person to relate this publication to

Aibin Liang

Yan Yan

Shanshan Yan

Yan Xu

Yan Xu

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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Designs of Two Quadruple-Node-Upset Self-Recoverable Latches for Highly Robust Computing in Harsh Radiation Environments.