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Disambiguation of "Shimazaki, Yasuhisa"

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A 28-nm Automotive Flash Microcontroller With Virtualization-Assisted Processor Supporting ISO26262 ASIL D.

, , , , , , , , , , , , , and . IEEE J. Solid State Circuits, 55 (1): 133-144 (2020)

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Yukihiro Yasuhisa

Yasuhisa Ichihashi

Yasuhisa Tsuda

 

Other publications of authors with the same name

Session 8 overview: Digital PLLs and security circuits., , and . ISSCC, page 140-141. IEEE, (2017)65nm Low-Power High-Density SRAM Operable at 1.0V under 3σ Systematic Variation Using Separate Vth Monitoring and Body Bias for NMOS and PMOS., , , and . ISSCC, page 384-385. IEEE, (2008)A 28nm 600MHz Automotive Flash Microcontroller with Virtualization-Assisted Processor for Next-Generation Automotive Architecture Complying with ISO26262 ASIL-D., , , , , , , , , and 3 other author(s). ISSCC, page 54-56. IEEE, (2019)3.5 A 40nm flash microcontroller with 0.80µs field-oriented-control intelligent motor timer and functional safety system for next-generation EV/HEV., , , , , , , , , and 2 other author(s). ISSCC, page 58-59. IEEE, (2017)A 28-nm Automotive Flash Microcontroller With Virtualization-Assisted Processor Supporting ISO26262 ASIL D., , , , , , , , , and 4 other author(s). IEEE J. Solid State Circuits, 55 (1): 133-144 (2020)A 33kDMIPS 6.4W Vehicle Communication Gateway Processor Achieving 10Gbps/W Network Routing, 40ms CAN Bus Start-Up and 1.4mW Standby Power., , , , , , , and . ISSCC, page 240-241. IEEE, (2023)A 0.41 µA Standby Leakage 32 kb Embedded SRAM with Low-Voltage Resume-Standby Utilizing All Digital Current Comparator in 28 nm HKMG CMOS., , , , , , and . IEEE J. Solid State Circuits, 48 (4): 917-923 (2013)A 40-nm low-power SRAM with multi-stage replica-bitline technique for reducing timing variation., , , , , and . CICC, page 701-704. IEEE, (2009)90-nm process-variation adaptive embedded SRAM modules with power-line-floating write technique., , , , , , , and . IEEE J. Solid State Circuits, 41 (3): 705-711 (2006)3-D System Integration of Processor and Multi-Stacked SRAMs Using Inductive-Coupling Link., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 45 (4): 856-862 (2010)