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A Design-for-Diagnosis Technique for SRAM Write Drivers., , , , , and . DATE, page 1480-1485. ACM, (2008)Statistical Sizing of an eSRAM Dummy Bitline Driver for Read Margin Improvement in the Presence of Variability Aspects., , , and . ISVLSI, page 310-315. IEEE Computer Society, (2008)A Novel Dummy Bitline Driver for Read Margin Improvement in an eSRAM., , , and . DELTA, page 107-110. IEEE Computer Society, (2008)March Pre: an Efficient Test for Resistive-Open Defects in the SRAM Pre-charge Circuit., , , , and . DDECS, page 256-261. IEEE Computer Society, (2006)Influence of Threshold Voltage Deviations on 90nm SRAM Core-Cell Behavior., , , , , , and . ATS, page 507-510. IEEE, (2007)Resistive-open defect injection in SRAM core-cell: analysis and comparison between 0.13 µm and 90 nm technologies., , , , and . DAC, page 857-862. ACM, (2005)Un-Restored Destructive Write Faults Due to Resistive-Open Defects in the Write Driver of SRAMs., , , , , and . VTS, page 361-368. IEEE Computer Society, (2007)Analysis and Test of Resistive-Open Defects in SRAM Pre-Charge Circuits., , , , and . J. Electron. Test., 23 (5): 435-444 (2007)Analysis of Resistive-Open Defects in SRAM Sense Amplifiers., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 17 (10): 1556-1559 (2009)A new design-for-test technique for SRAM core-cell stability faults., , , , , , and . DATE, page 1344-1348. IEEE, (2009)