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Quantitative SEU Fault Evaluation for SRAM-Based FPGA Architectures and Synthesis Algorithms.

N. Jing, J. Lee, Z. Feng, W. He, Z. Mao, S. Wen, R. Wong, and L. He. FPL, page 282-285. IEEE Computer Society, (2011)

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Zhigang Zhang

Zhigang Shen

Zhigang Zhang

Zhigang Gao

Other publications of authors with the same name

A Mapping Method for Reconfigurable Array based on Decoupled DataFlow.Z. Zhang, J. Jiang, W. Sheng, Q. Wang, Z. Mao, and N. Jing. BigDataSecurity, page 180-185. IEEE, (2021)A contactless testing methodology for pre-bond interposer.J. Jiang, W. Sheng, Q. Wang, and Z. Mao. MWSCAS, page 1-4. IEEE, (2015)An efficient VLSI architecture for extended variable block sizes motion estimation.W. He, W. Chen, and Z. Mao. SoCC, page 347-350. IEEE, (2010)Implementation of Java Card Virtual Machine.L. Songyan, Z. Mao, and Y. Ye. J. Comput. Sci. Technol., 15 (6): 591-596 (2000)A novel soft error sensitivity characterization technique based on simulated fault injection and constrained association analysis.W. Sheng, L. Xiao, and Z. Mao. ICECS, page 766-769. IEEE, (2008)Enhanced Memory Reliability Against Multiple Cell Upsets Using Decimal Matrix Code.J. Guo, L. Xiao, Z. Mao, and Q. Zhao. IEEE Trans. Very Large Scale Integr. Syst., 22 (1): 127-135 (2014)Pareto based Multi-objective Mapping IP Cores onto NoC Architectures.W. Zhou, Y. Zhang, and Z. Mao. APCCAS, page 331-334. IEEE, (2006)Synergistic Effect of BTI and Process Variations on Impact and Monitoring of Combination Circuit.L. Li, L. Xiao, J. Li, H. Liu, and Z. Mao. ASICON, page 1-4. IEEE, (2019)Towards Higher Performance and Robust Compilation for CGRA Modulo Scheduling.Z. Zhao, W. Sheng, Q. Wang, W. Yin, P. Ye, J. Li, and Z. Mao. IEEE Trans. Parallel Distributed Syst., 31 (9): 2201-2219 (2020)Mapping Long-Term Spatiotemporal Dynamics of Pen Aquaculture in a Shallow Lake: Less Aquaculture Coming along Better Water Quality.J. Luo, R. Pu, R. Ma, X. Wang, X. Lai, Z. Mao, L. Zhang, Z. Peng, and Z. Sun. Remote. Sens., 12 (11): 1866 (2020)

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Disambiguation of "Mao, Zhigang"

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Quantitative SEU Fault Evaluation for SRAM-Based FPGA Architectures and Synthesis Algorithms.

Please choose a person to relate this publication to

Zhigang Zhang

Zhigang Shen

Zhigang Zhang

Zhigang Zhang

Zhigang Gao

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Mao, Zhigang"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Quantitative SEU Fault Evaluation for SRAM-Based FPGA Architectures and Synthesis Algorithms.

Please choose a person to relate this publication to

Zhigang Zhang

Zhigang Shen

Zhigang Zhang

Zhigang Zhang

Zhigang Gao

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Quantitative SEU Fault Evaluation for SRAM-Based FPGA Architectures and Synthesis Algorithms.