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Disambiguation of "Devarajegowda, Keerthikumara"

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Symbolic QED Pre-silicon Verification for Automotive Microcontroller Cores: Industrial Case Study.

, , , , , , , , , , and . DATE, page 1000-1005. IEEE, (2019)

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Other publications of authors with the same name

Towards Fault Simulation at Mixed Register-Transfer/Gate-Level Models., , , , , , , and . DFT, page 1-6. IEEE, (2021)Using Machine Learning for predicting area and Firmware metrics of hardware designs from abstract specifications., , , , , and . Microprocess. Microsystems, (2019)How to Keep 4-Eyes Principle in a Design and Property Generation Flow., , and . MBMV, page 1-6. VDE Verlag, (2019)Model-based Generation of Assertions for Pre-silicon Verification.. Kaiserslautern University of Technology, Germany, (2021)Extending Verilator to Enable Fault Simulation., , , , , and . MBMV, page 1-6. VDE/IEEE, (2021)MetFI: Model-driven Fault Simulation Framework., , , , , and . CoRR, (2022)Fast and Accurate Model-Driven FPGA-based System-Level Fault Emulation., , , , , , , and . VLSI-SoC, page 1-6. IEEE, (2022)Modelling Peripheral Designs using FSM-like Notation for Complete Property Set Generation., , , , and . MCSoC, page 508-515. IEEE, (2023)MetaFS: Model-driven Fault Simulation Framework., , , , , , and . DFT, page 1-4. IEEE, (2022)G-QED: Generalized QED Pre-silicon Verification beyond Non-Interfering Hardware Accelerators., , , , , , , , , and 2 other author(s). DAC, page 1-6. IEEE, (2023)