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Disambiguation of "Ainspan, Herschel A."

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A 128-Gb/s 1.3-pJ/b PAM-4 Transmitter With Reconfigurable 3-Tap FFE in 14-nm CMOS.

, , , , , , and . IEEE J. Solid State Circuits, 55 (1): 19-26 (2020)

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Andreas Herschel

Olga Herschel

Wilhelm Herschel

Knut Herschel

Daniela Herschel

 

Other publications of authors with the same name

An 8x 10-Gb/s Source-Synchronous I/O System Based on High-Density Silicon Carrier Interconnects., , , , , , , , , and 4 other author(s). IEEE J. Solid State Circuits, 47 (4): 884-896 (2012)A 1.8-pJ/bit 16×16-Gb/s source synchronous parallel interface in 32nm SOI CMOS with receiver redundancy for link recalibration., , , , , , , , and . CICC, page 1-4. IEEE, (2015)RF circuit design aspects of spiral inductors on silicon., , , , and . IEEE J. Solid State Circuits, 33 (12): 2028-2034 (1998)An 11 GHz 3-V SiGe voltage controlled oscillator with integrated resonator., , , , , , , and . IEEE J. Solid State Circuits, 32 (9): 1451-1454 (1997)A 6.4-Gb/s CMOS SerDes core with feed-forward and decision-feedback equalization., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 40 (12): 2633-2645 (2005)A 5.2 GHz 3.3 V I/Q SiGe RF transceiver., , and . CICC, page 217-220. IEEE, (1999)FEC-Free 60-Gb/s Silicon Photonic Link Using SiGe-Driver ICs Hybrid-Integrated with Photonics-Enabled CMOS., , , , , , , , , and 1 other author(s). OFC, page 1-3. IEEE, (2018)A 250-mW 60-GHz CMOS Transceiver SoC Integrated With a Four-Element AiP Providing Broad Angular Link Coverage., , , , , , , , , and 2 other author(s). IEEE J. Solid State Circuits, 55 (6): 1516-1529 (2020)Errata Erratum to Ä 128-Gb/s 1.3-pJ/b PAM-4 Transmitter With Reconfigurable 3-Tap FFE in 14-nm CMOS"., , , , , , and . IEEE J. Solid State Circuits, 55 (4): 1124 (2020)Bang-bang digital PLLs at 11 and 20GHz with sub-200fs integrated jitter for high-speed serial communication applications., , , , , , and . ISSCC, page 94-95. IEEE, (2009)