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Disambiguation of "Curran, Brian W."

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A 4.1-ns compact 54×54-b multiplier utilizing sign-select Booth encoders.

, , , , , , , , , , , , , , , , , , , , , , and . IEEE J. Solid State Circuits, 32 (11): 1676-1682 (1997)

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Brian Curran

Declan Curran

Rolf-Walter Briant

Benoît Briand

Christopher Curran

 

Other publications of authors with the same name

High-Performance CMOS Circuit Techniques for the G-4 S/390 Microprocessor., , , and . ICCD, page 247-252. IEEE Computer Society, (1997)Deep submicron design techniques for the 500 MHz IBM S/390 G5 custom microprocessor., , , , , , , , , and 2 other author(s). ICCD, page 258-263. IEEE Computer Society, (1998)Across the Stack Opportunities for Deep Learning Acceleration., , , , , , , , , and 21 other author(s). ISLPED, page 35:1-35:2. ACM, (2018)Design of the Power6 Microprocessor., , , , , , , , , and 7 other author(s). ISSCC, page 96-97. IEEE, (2007)Design methodology for the S/390 Parallel Enterprise Server G4 microprocessors., , , , , , , , and . IBM J. Res. Dev., 41 (4&5): 515-548 (1997)IBM eServer z900 high-frequency microprocessor technology, circuits, and design methodology., , , , , , , , , and . IBM J. Res. Dev., 46 (4-5): 631- (2002)Circuit design techniques for the high-performance CMOS IBM S/390 Parallel Enterprise Server G4 microprocessor., , , , , , , , , and 1 other author(s). IBM J. Res. Dev., 41 (4&5): 489-504 (1997)Robust power management in the IBM z13., , , , , , , , , and 5 other author(s). IBM J. Res. Dev., (2015)A Scalable Multi- TeraOPS Deep Learning Processor Core for AI Trainina and Inference., , , , , , , , , and 21 other author(s). VLSI Circuits, page 35-36. IEEE, (2018)The zEnterprise 196 System and Microprocessor., , , , , , and . IEEE Micro, 31 (2): 26-40 (2011)