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Disambiguation of "Mayo, Mark D."

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A 4.1-ns compact 54×54-b multiplier utilizing sign-select Booth encoders.

, , , , , , , , , , , , , , , , , , , , , , and . IEEE J. Solid State Circuits, 32 (11): 1676-1682 (1997)

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Bruce Mayo

Ursula Mayo

Moisés Mayordomo

Guy André Mayor

Mayo Röttger

 

Other publications of authors with the same name

Chip integration methodology for the IBM S/390 G5 and G6 custom microprocessors., , , , , , , , , and 6 other author(s). IBM J. Res. Dev., 43 (5): 681-706 (1999)Circuit and Physical Design of the zEnterprise™ EC12 Microprocessor Chips and Multi-Chip Module., , , , , , , , , and 15 other author(s). IEEE J. Solid State Circuits, 49 (1): 9-18 (2014)4.1 22nm Next-generation IBM System z microprocessor., , , , , , , , , and 21 other author(s). ISSCC, page 1-3. IEEE, (2015)High Performance Packaged Electronics for the IBM ES9000TM Mainframe., , , , , and . ICCD, page 534-539. IEEE Computer Society, (1991)Circuit design techniques for the high-performance CMOS IBM S/390 Parallel Enterprise Server G4 microprocessor., , , , , , , , , and 1 other author(s). IBM J. Res. Dev., 41 (4&5): 489-504 (1997)Improved performance of IBM Enterprise System/9000 bipolar logic chips., , , , and . IBM J. Res. Dev., 36 (5): 829-834 (1992)IBM z13 circuit design and methodology., , , , , , , , , and 22 other author(s). IBM J. Res. Dev., (2015)5.5GHz system z microprocessor and multi-chip module., , , , , , , , , and 13 other author(s). ISSCC, page 46-47. IEEE, (2013)A 4.1-ns compact 54×54-b multiplier utilizing sign-select Booth encoders., , , , , , , , , and 13 other author(s). IEEE J. Solid State Circuits, 32 (11): 1676-1682 (1997)A 5.2GHz microprocessor chip for the IBM zEnterprise™ system., , , , , , , , , and 17 other author(s). ISSCC, page 70-72. IEEE, (2011)