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Disambiguation of "Goutis, Constantinos E."

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A methodology for speeding up loop kernels by exploiting the software information and the memory architecture.

, , and . Comput. Lang. Syst. Struct., (2015)

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Constantinos Toulacis

Constantinos Neophytou

Constantinos Phanouriou

Constantinos Pavlou

Constantinos Carathanassis

 

Other publications of authors with the same name

Novel techniques for bus power consumption reduction in realizations of sum-of-product computation., , , and . IEEE Trans. Very Large Scale Integr. Syst., 7 (4): 492-497 (1999)A fast and accurate delay dependent method for switching estimation of large combinational circuits., , , , and . J. Syst. Archit., 48 (4-5): 113-124 (2002)Mapping DSP Applications to a High-Performance Reconfigurable Coarse-Grain Data-Path., , , , and . FPL, volume 3203 of Lecture Notes in Computer Science, page 868-873. Springer, (2004)A low-power and high-throughput implementation of the SHA-1 hash function., , , and . ISCAS (4), page 4086-4089. IEEE, (2005)Alternative Architectures for the 2-D DCT Algorithm., , , and . ISCAS, page 2156-2159. IEEE, (1995)Direct mapping of nested loops on piecewise regular processor arrays., , and . Algorithms and Parallel VLSI Architectures, page 145-150. Elsevier, (1991)Constraint optimization algorithms for digital image reconstruction from projections.. University of Southampton, UK, (1978)British Library, EThOS.A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable Platforms, , , , and . CoRR, (2007)A Framework for Data Partitioning for C++ Data-Intensive Applications., , , , , , and . Des. Autom. Embed. Syst., 9 (2): 101-121 (2004)A Probabilistic Power Estimation Method for Combinational Circuits Under Real Gate Delay Model., , , and . VLSI Design, 12 (1): 69-79 (2001)