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A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks.

J. Kim, C. Nicopoulos, D. Park, V. Narayanan, M. Yousif, and C. Das. ISCA, page 4-15. IEEE Computer Society, (2006)

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Chrysostomos Kyprianou

Annette Nicopoulos

Chrysostomos Papaioannou

Chrysostomos Mantzabinos

Chrysostomos Valderanis

Other publications of authors with the same name

Toward efficient check-pointing and rollback under on-demand SBST in chip multi-processors.M. Skitsas, C. Nicopoulos, and M. Michael. IOLTS, page 110-115. IEEE, (2015)On the Effects of Process Variation in Network-on-Chip Architectures.C. Nicopoulos, S. Srinivasan, A. Yanamandra, D. Park, V. Narayanan, C. Das, and M. Irwin. IEEE Trans. Dependable Secur. Comput., 7 (3): 240-254 (2010)DeMM: A Decoupled Matrix Multiplication Engine Supporting Relaxed Structured Sparsity.C. Peltekis, V. Titopoulos, C. Nicopoulos, and G. Dimitrakopoulos. CoRR, (2024)ArrayFlex: A Systolic Array Architecture with Configurable Transparent Pipelining.C. Peltekis, D. Filippas, G. Dimitrakopoulos, C. Nicopoulos, and D. Pnevmatikatos. CoRR, (2022)Switch folding: network-on-chip routers with time-multiplexed output ports.G. Dimitrakopoulos, N. Georgiadis, C. Nicopoulos, and E. Kalligeros. DATE, page 344-349. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Network-on-Chip Architectures - A Holistic Design ExplorationC. Nicopoulos, V. Narayanan, and C. Das. Lecture Notes in Electrical Engineering Springer, (2010)Networks-on-Chip With Double-Data-Rate Links.A. Psarras, S. Moisidis, C. Nicopoulos, and G. Dimitrakopoulos. IEEE Trans. Circuits Syst. I Regul. Pap., 64-I (12): 3103-3114 (2017)A High-Performance and Energy-Efficient Virtually Tagged Stack Cache Architecture for Multi-core Environments.S. Kang, C. Nicopoulos, H. Lee, and J. Kim. HPCC, page 58-67. IEEE, (2011)Dynamic Adjustment of Test-Sequence Duration for Increasing the Functional Coverage.Z. Takakis, D. Mangiras, C. Nicopoulos, and G. Dimitrakopoulos. IVSW, page 61-66. IEEE, (2019)2D Error Correction for F/F based Arrays using In-Situ Real-Time Error Detection (RTD).Y. Sazeides, A. Bramnik, R. Gabor, C. Nicopoulos, R. Canal, D. Konstantinou, and G. Dimitrakopoulos. DFT, page 1-4. IEEE, (2020)

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Disambiguation of "Nicopoulos, Chrysostomos"

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A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks.

Please choose a person to relate this publication to

Chrysostomos Kyprianou

Annette Nicopoulos

Chrysostomos Papaioannou

Chrysostomos Mantzabinos

Chrysostomos Valderanis

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Nicopoulos, Chrysostomos"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks.

Please choose a person to relate this publication to

Chrysostomos Kyprianou

Annette Nicopoulos

Chrysostomos Papaioannou

Chrysostomos Mantzabinos

Chrysostomos Valderanis

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks.