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A Case for Self-Managing DRAM Chips: Improving Performance, Efficiency, Reliability, and Security via Autonomous in-DRAM Maintenance Operations., , , , and . CoRR, (2022)TuRaN: True Random Number Generation Using Supply Voltage Underscaling in SRAMs., , , , , , , , and . CoRR, (2022)CoMeT: Count-Min-Sketch-based Row Tracking to Mitigate RowHammer at Low Cost., , , , , , , and . CoRR, (2024)Functionally-Complete Boolean Logic in Real DRAM Chips: Experimental Characterization and Analysis., , , , , , , , , and . CoRR, (2024)Ramulator 2.0: A Modern, Modular, and Extensible DRAM Simulator., , , , , and . CoRR, (2023)DR-STRaNGe: End-to-End System Design for DRAM-based True Random Number Generators., , , , , , , and . HPCA, page 1141-1155. IEEE, (2022)ABACuS: All-Bank Activation Counters for Scalable and Low Overhead RowHammer Mitigation., , , , , , , , and . CoRR, (2023)Understanding Read Disturbance in High Bandwidth Memory: An Experimental Analysis of Real HBM2 DRAM Chips., , , , , , , , and . CoRR, (2023)Fundamentally Understanding and Solving RowHammer., , and . CoRR, (2022)PULSAR: Simultaneous Many-Row Activation for Reliable and High-Performance Computing in Off-the-Shelf DRAM Chips., , , , , , , , , and 1 other author(s). CoRR, (2023)