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Active Memory Cube: A processing-in-memory architecture for exascale systems.

R. Nair, S. Antão, C. Bertolli, P. Bose, J. Brunheroto, T. Chen, C. Cher, C. Costa, J. Doi, C. Evangelinos, B. Fleischer, T. Fox, D. Gallo, L. Grinberg, J. Gunnels, A. Jacob, P. Jacob, H. Jacobson, T. Karkhanis, C. Kim, J. Moreno, J. O'Brien, M. Ohmacht, Y. Park, D. Prener, B. Rosenburg, K. Ryu, O. Sallenave, M. Serrano, P. Siegl, K. Sugavanam, and Z. Sura. IBM J. Res. Dev., (2015)

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Sura Ahmad

Martin Sura

Achim Sura

Zehra Özcan

Zehra Kilic

Other publications of authors with the same name

Using Multiple Threads to Accelerate Single Thread Performance.Z. Sura, K. O'Brien, and J. Brunheroto. IPDPS, page 985-994. IEEE Computer Society, (2014)Compiler techniques for high performance sequentially consistent java programs.Z. Sura, X. Fang, C. Wong, S. Midkiff, J. Lee, and D. Padua. PPoPP, page 2-13. ACM, (2005)Collaborative and Accountable Hardware Governance Using Blockchain.A. Kundu, Z. Sura, and U. Sharma. CIC, page 114-121. IEEE Computer Society, (2018)Design and implementation of software-managed caches for multicores with local memory.S. Seo, J. Lee, and Z. Sura. HPCA, page 55-66. IEEE Computer Society, (2009)Exploiting Fine- and Coarse-Grained Parallelism Using a Directive Based Approach.A. Jacob, R. Nair, A. Eichenberger, S. Antão, C. Bertolli, T. Chen, Z. Sura, K. O'Brien, and M. Wong. IWOMP, volume 9342 of Lecture Notes in Computer Science, page 30-41. Springer, (2015)COMIC++: A software SVM system for heterogeneous multicore accelerator clusters.J. Lee, J. Lee, S. Seo, J. Kim, S. Kim, and Z. Sura. HPCA, page 1-12. IEEE Computer Society, (2010)Data access optimization in a processing-in-memory system.Z. Sura, A. Jacob, T. Chen, B. Rosenburg, O. Sallenave, C. Bertolli, S. Antao, J. Brunheroto, Y. Park, K. O'Brien and 1 other author(s). Conf. Computing Frontiers, page 6:1-6:8. ACM, (2015)Using Structured Input and Modularity for Improved Learning.Z. Sura, T. Chen, and H. Sung. CoRR, (2019)Coordinating GPU threads for OpenMP 4.0 in LLVM.C. Bertolli, S. Antão, A. Eichenberger, K. O'Brien, Z. Sura, A. Jacob, T. Chen, and O. Sallenave. LLVM@SC, page 12-21. IEEE Computer Society, (2014)NUMA-Aware Data-Transfer Measurements for Power/NVLink Multi-GPU Systems.C. Pearson, I. Chung, Z. Sura, W. Hwu, and J. Xiong. ISC Workshops, volume 11203 of Lecture Notes in Computer Science, page 448-454. Springer, (2018)

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Disambiguation of "Sura, Zehra"

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Active Memory Cube: A processing-in-memory architecture for exascale systems.

Please choose a person to relate this publication to

Sura Ahmad

Martin Sura

Achim Sura

Zehra Özcan

Zehra Kilic

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Sura, Zehra"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Active Memory Cube: A processing-in-memory architecture for exascale systems.

Please choose a person to relate this publication to

Sura Ahmad

Martin Sura

Achim Sura

Zehra Özcan

Zehra Kilic

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

Active Memory Cube: A processing-in-memory architecture for exascale systems.