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Disambiguation of "Angarita, Fabian"

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Modified Shuffled Based Architecture for High-Throughput Decoding of LDPC Codes.

, , , and . J. Signal Process. Syst., 68 (2): 139-149 (2012)

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Natalia Garcia Angarita

Natalia Garcia Angarita

Gerd Fabian

Erich Fabian

Eduard Fábián

 

Other publications of authors with the same name

Power Consumption Reduction in a Viterbi Decoder for OFDM-WLAN., , , , and . Journal of Circuits, Systems, and Computers, 18 (7): 1333-1337 (2009)Architectures for the Implementation of a OFDM-WLAN Viterbi Decoder., , , , and . J. Signal Process. Syst., 52 (1): 35-44 (2008)Reduced-Complexity Min-Sum Algorithm for Decoding LDPC Codes With Low Error-Floor., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 61-I (7): 2150-2158 (2014)Low-complexity low-density parity check decoding algorithm for high-speed very large scale integration implementation., , , and . IET Commun., 6 (16): 2575-2581 (2012)Efficient Mapping of CORDIC Algorithm for OFDM-Based WLAN., , , , and . J. Signal Process. Syst., 52 (2): 181-191 (2008)DIGIMOD: A Tool to Implement FPGA-Based Digital IF and Baseband Modems., , , , , , , , , and . FPL, volume 2778 of Lecture Notes in Computer Science, page 988-991. Springer, (2003)High-throughput FPGA-based emulator for structured LDPC codes., , , and . ICECS, page 404-407. IEEE, (2012)Statistical Power Estimation for FPGA., , , and . FPL, page 515-518. IEEE, (2005)Efficient FPGA Implementation of CORDIC Algorithm for Circular and Linear Coordinates., , , and . FPL, page 535-538. IEEE, (2005)Improved Sliced Message Passing Architecture for High Throughput Decoding of LDPC Codes., , , and . J. Signal Process. Syst., 66 (2): 99-104 (2012)