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Disambiguation of "Nair, Indira"

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Transaction-level modeling for architectural and power analysis of PowerPC and CoreConnect-based systems.

, , , , , , and . Des. Autom. Embed. Syst., 10 (2-3): 105-125 (2005)

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Chithra Kumaran Nair

Photodisintegration studies of astrophysically relevant p-nuclei. TU Dresden, (2009)

Indira Käpplinger

Ramya Nair

Banafsheh Nairizi

Jayan Nandanan Nair

 

Other publications of authors with the same name

Efficient Fault Simulation of CMOS Circuits with Accurate Models., , , , , , and . ITC, page 520-529. IEEE Computer Society, (1986)Evaluating an information system for policy modeling and uncertainty analysis., , , and . JASIS, 37 (5): 319-330 (1986)An efficient system-on-a-chip design methodology for networking applications., , and . CASES, page 212-219. ACM, (2004)SEAS: a system for early analysis of SoCs., , , , , , , and . CODES+ISSS, page 150-155. ACM, (2003)Pragmatism and Care in Engineering Ethics., and . Science and Engineering Ethics, 26 (1): 65-87 (2020)14.1 A Software-Assisted Peak Current Regulation Scheme to Improve Power-Limited Inference Performance in a 5nm AI SoC., , , , , , , , , and 36 other author(s). ISSCC, page 254-256. IEEE, (2024)AVPGEN-A test generator for architecture verification., , , , , , , , , and 1 other author(s). IEEE Trans. Very Large Scale Integr. Syst., 3 (2): 188-200 (1995)A Small Test Generator for Large Designs., , , , and . ITC, page 30-40. IEEE Computer Society, (1992)Power-efficient, reliable microprocessor architectures: modeling and design methods., , , , , , , , , and 5 other author(s). ACM Great Lakes Symposium on VLSI, page 299-304. ACM, (2010)Symbolic implication in test generation., , , and . EURO-DAC, page 492-496. EEE Computer Society, (1991)