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Comparing Energy, Area, Delay Tradeoffs in Going Vertical with CMOS and Asymmetric HTFETs.

M. Kim, W. Cane-Wissing, J. Sampson, S. Datta, V. Narayanan, and S. Gupta. ISVLSI, page 303-308. IEEE Computer Society, (2015)

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Nimisha Suman

Hazem Suman

Suman Jha

Suman Baidya

Suman Sahai

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Exploiting Heterogeneity for Energy Efficiency in Chip Multiprocessors.V. Saripalli, G. Sun, A. Mishra, Y. Xie, S. Datta, and V. Narayanan. IEEE J. Emerg. Sel. Topics Circuits Syst., 1 (2): 109-119 (2011)The Impact of Ferroelectric FETs on Digital and Analog Circuits and Architectures.X. Chen, K. Ni, M. Niemier, D. Reis, X. Sun, P. Wang, S. Datta, X. Hu, X. Yin, M. Jerry and 2 other author(s). IEEE Des. Test, 37 (1): 79-99 (2020)Design of 2T/Cell and 3T/Cell Nonvolatile Memories with Emerging Ferroelectric FETs.X. Li, J. Wu, K. Ni, S. George, K. Ma, J. Sampson, S. Gupta, Y. Liu, H. Yang, S. Datta and 1 other author(s). IEEE Des. Test, 36 (3): 39-45 (2019)Improving energy efficiency of multi-threaded applications using heterogeneous CMOS-TFET multicores.K. Swaminathan, E. Kultursay, V. Saripalli, V. Narayanan, M. Kandemir, and S. Datta. ISLPED, page 247-252. IEEE/ACM, (2011)Tunnel FET technology: A reliability perspective.S. Datta, H. Liu, and V. Narayanan. Microelectron. Reliab., 54 (5): 861-874 (2014)Comparative Area and Parasitics Analysis in FinFET and Heterojunction Vertical TFET Standard Cells.M. Kim, W. Cane-Wissing, X. Li, J. Sampson, S. Datta, S. Gupta, and V. Narayanan. ACM J. Emerg. Technol. Comput. Syst., 12 (4): 38:1-38:23 (2016)Ferroelectric Transistor based Non-Volatile Flip-Flop.D. Wang, S. George, A. Aziz, S. Datta, V. Narayanan, and S. Gupta. ISLPED, page 10-15. ACM, (2016)A defect-aware approach for mapping reconfigurable Single-Electron Transistor arrays.C. Huang, C. Liu, C. Wang, Y. Chen, S. Datta, and V. Narayanan. ASP-DAC, page 118-123. IEEE, (2015)Computational paradigms using oscillatory networks based on state-transition devices.A. Parihar, N. Shukla, M. Jerry, S. Datta, and A. Raychowdhury. IJCNN, page 3415-3422. IEEE, (2017)Ferroelectrics: From Memory to Computing.K. Ni, S. Dutta, and S. Datta. ASP-DAC, page 401-406. IEEE, (2020)

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Disambiguation of "Datta, Suman"

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Comparing Energy, Area, Delay Tradeoffs in Going Vertical with CMOS and Asymmetric HTFETs.

Please choose a person to relate this publication to

Nimisha Suman

Hazem Suman

Suman Jha

Suman Baidya

Suman Sahai

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Datta, Suman"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Comparing Energy, Area, Delay Tradeoffs in Going Vertical with CMOS and Asymmetric HTFETs.

Please choose a person to relate this publication to

Nimisha Suman

Hazem Suman

Suman Jha

Suman Baidya

Suman Sahai

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

Comparing Energy, Area, Delay Tradeoffs in Going Vertical with CMOS and Asymmetric HTFETs.