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A 250MHz-to-4GHz Δ-Σ fractional-N frequency synthesizer with adjustable duty cycle.

, and . ISCAS, page 1839-1842. IEEE, (2010)

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A Wide-tuning-range and Reduced-fractional-spurs Synthesizer Combining Sigma-Delta Fractional-N and Integer Flying-Adder Techniques., , and . ISCAS, page 1377-1380. IEEE, (2009)10-Gb/s Distributed Amplifier-Based VCSEL Driver IC With ESD Protection in 130-nm CMOS., , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (7): 2502-2510 (2016)High-Efficiency E-Band Power Amplifiers and Transmitter Using Gate Capacitance Linearization in a 65-nm CMOS Process., , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 64-II (3): 234-238 (2017)An Industrial Case Study: PaRent (Parallel & Concurrent) Testing for Complex Mixed-Signal Devices., , and . NATW, page 33-38. IEEE, (2015)A 14nV/√Hz 14μW Chopper Instrumentation Amplifier with Dynamic Offset Zeroing (DOZ) Technique for Ripple Reduction., and . CICC, page 1-4. IEEE, (2019)A 43.6-dB SNDR 1-GS/s 3.2-mW SAR ADC With Background-Calibrated Fine and Coarse Comparators in 28-nm CMOS., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 27 (9): 1998-2007 (2019)A low-power 28 Gb/s CDR using artificial lc transmission line technique in 65 nm CMOS., , , , , , , and . MWSCAS, page 85-88. IEEE, (2014)Controller Area Network (CAN) Bus Transceiver with Authentication Support., , , , , , , and . ISCAS, page 1328-1331. IEEE, (2022)A 1GS/s 82dB Peak-SFDR 12b Single-Channel Pipe-SAR ADC with Harmonic-Injecting Cross-Coupled-Pair and Fast N-replica Bootstrap Switch Achieving 7.5fj/conv-step., , , and . CICC, page 1-2. IEEE, (2021)Innovate Practices on CyberSecurity of Hardware Semiconductor Devices., , , , , , , , , and 4 other author(s). VTS, page 1. IEEE, (2019)