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Trends toward on-chip networked microsystems., and . IJHPCN, 3 (1): 3-18 (2005)An SCI-based Software VIA System for PC Clustering., , and . CLUSTER, page 227-234. IEEE Computer Society, (2001)A Framework for Architecture-Level Lifetime Reliability Modeling., , , , and . DSN, page 534-543. IEEE Computer Society, (2007)Early chip planning cockpit., , , , and . DATE, page 863-866. IEEE, (2011)The Performance of Routing Algorithms under Bursty Traffic Loads., and . PDPTA, page 737-743. CSREA Press, (2003)Power-efficient, reliable microprocessor architectures: modeling and design methods., , , , , , , , , and 5 other author(s). ACM Great Lakes Symposium on VLSI, page 299-304. ACM, (2010)Power management of multi-core chips: Challenges and pitfalls., , , , , , , , , and 1 other author(s). DATE, page 977-982. IEEE, (2012)Floorplanning challenges in early chip planning., , , , , , and . SoCC, page 388-393. IEEE, (2011)A Proactive Wearout Recovery Approach for Exploiting Microarchitectural Redundancy to Extend Cache SRAM Lifetime., , , and . ISCA, page 353-362. IEEE Computer Society, (2008)