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TEASE: a systematic analysis framework for early evaluation of FinFET-based advanced technology nodes.

, , , , , , , , , , , and . DAC, page 24:1-24:6. ACM, (2013)

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Low Power Correlating Caches for Network Processors., and . J. Low Power Electron., 1 (2): 108-118 (2005)A framework for automatic parallelization, static and dynamic memory optimization in MPSoC platforms., , , , , , and . DAC, page 549-554. ACM, (2010)Automatic parallelization of embedded software using hierarchical task graphs and integer linear programming., , and . CODES+ISSS, page 267-276. ACM, (2010)Dynamic Quantization Range Control for Analog-in-Memory Neural Networks Acceleration., , , , , , , , , and 2 other author(s). ACM Trans. Design Autom. Electr. Syst., 27 (5): 46:1-46:21 (2022)A Case for Clumsy Packet Processors., and . MICRO, page 147-156. IEEE Computer Society, (2004)Tiny ci-SAR A/D Converter for Deep Neural Networks in Analog in-Memory Computation., , , , and . ISCAS, page 1823-1827. IEEE, (2022)Evaluating the Effects of FeFET Device Variability on Charge Sharing Based AiMC Accelerator., , , , , and . ISCAS, page 1-5. IEEE, (2023)Sequential 3D: Key integration challenges and opportunities for advanced semiconductor scaling., , , , , , , , , and 15 other author(s). ICICDT, page 145-148. IEEE, (2018)MNEMEE: a framework for memory management and optimization of static and dynamic data in MPSoCs., , , and . CASES, page 257-258. ACM, (2010)AERO: Design Space Exploration Framework for Resource-Constrained CNN Mapping on Tile-Based Accelerators., , , , , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 12 (2): 508-521 (2022)